@@ -48,16 +48,6 @@
#define ARCH_GENERIC_PCI_MMAP_RESOURCE 1
#define arch_can_pci_mmap_io() 1
-extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
- size_t count);
-extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
- size_t count);
-extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
- struct vm_area_struct *vma,
- enum pci_mmap_state mmap_state);
-
-#define HAVE_PCI_LEGACY 1
-
extern void pcibios_resource_survey(void);
struct file;
@@ -146,146 +146,6 @@ int pci_iobar_pfn(struct pci_dev *pdev, int bar, struct vm_area_struct *vma)
return 0;
}
-/* This provides legacy IO read access on a bus */
-int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val, size_t size)
-{
- unsigned long offset;
- struct pci_controller *hose = pci_bus_to_host(bus);
- struct resource *rp = &hose->io_resource;
- void __iomem *addr;
-
- /* Check if port can be supported by that bus. We only check
- * the ranges of the PHB though, not the bus itself as the rules
- * for forwarding legacy cycles down bridges are not our problem
- * here. So if the host bridge supports it, we do it.
- */
- offset = (unsigned long)hose->io_base_virt - _IO_BASE;
- offset += port;
-
- if (!(rp->flags & IORESOURCE_IO))
- return -ENXIO;
- if (offset < rp->start || (offset + size) > rp->end)
- return -ENXIO;
- addr = hose->io_base_virt + port;
-
- switch (size) {
- case 1:
- *((u8 *)val) = in_8(addr);
- return 1;
- case 2:
- if (port & 1)
- return -EINVAL;
- *((u16 *)val) = in_le16(addr);
- return 2;
- case 4:
- if (port & 3)
- return -EINVAL;
- *((u32 *)val) = in_le32(addr);
- return 4;
- }
- return -EINVAL;
-}
-
-/* This provides legacy IO write access on a bus */
-int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val, size_t size)
-{
- unsigned long offset;
- struct pci_controller *hose = pci_bus_to_host(bus);
- struct resource *rp = &hose->io_resource;
- void __iomem *addr;
-
- /* Check if port can be supported by that bus. We only check
- * the ranges of the PHB though, not the bus itself as the rules
- * for forwarding legacy cycles down bridges are not our problem
- * here. So if the host bridge supports it, we do it.
- */
- offset = (unsigned long)hose->io_base_virt - _IO_BASE;
- offset += port;
-
- if (!(rp->flags & IORESOURCE_IO))
- return -ENXIO;
- if (offset < rp->start || (offset + size) > rp->end)
- return -ENXIO;
- addr = hose->io_base_virt + port;
-
- /* WARNING: The generic code is idiotic. It gets passed a pointer
- * to what can be a 1, 2 or 4 byte quantity and always reads that
- * as a u32, which means that we have to correct the location of
- * the data read within those 32 bits for size 1 and 2
- */
- switch (size) {
- case 1:
- out_8(addr, val >> 24);
- return 1;
- case 2:
- if (port & 1)
- return -EINVAL;
- out_le16(addr, val >> 16);
- return 2;
- case 4:
- if (port & 3)
- return -EINVAL;
- out_le32(addr, val);
- return 4;
- }
- return -EINVAL;
-}
-
-/* This provides legacy IO or memory mmap access on a bus */
-int pci_mmap_legacy_page_range(struct pci_bus *bus,
- struct vm_area_struct *vma,
- enum pci_mmap_state mmap_state)
-{
- struct pci_controller *hose = pci_bus_to_host(bus);
- resource_size_t offset =
- ((resource_size_t)vma->vm_pgoff) << PAGE_SHIFT;
- resource_size_t size = vma->vm_end - vma->vm_start;
- struct resource *rp;
-
- pr_debug("pci_mmap_legacy_page_range(%04x:%02x, %s @%llx..%llx)\n",
- pci_domain_nr(bus), bus->number,
- mmap_state == pci_mmap_mem ? "MEM" : "IO",
- (unsigned long long)offset,
- (unsigned long long)(offset + size - 1));
-
- if (mmap_state == pci_mmap_mem) {
- /* Hack alert !
- *
- * Because X is lame and can fail starting if it gets an error
- * trying to mmap legacy_mem (instead of just moving on without
- * legacy memory access) we fake it here by giving it anonymous
- * memory, effectively behaving just like /dev/zero
- */
- if ((offset + size) > hose->isa_mem_size) {
- pr_debug("Process %s (pid:%d) mapped non-existing PCI",
- current->comm, current->pid);
- pr_debug("legacy memory for 0%04x:%02x\n",
- pci_domain_nr(bus), bus->number);
- if (vma->vm_flags & VM_SHARED)
- return shmem_zero_setup(vma);
- return 0;
- }
- offset += hose->isa_mem_phys;
- } else {
- unsigned long io_offset = (unsigned long)hose->io_base_virt -
- _IO_BASE;
- unsigned long roffset = offset + io_offset;
- rp = &hose->io_resource;
- if (!(rp->flags & IORESOURCE_IO))
- return -ENXIO;
- if (roffset < rp->start || (roffset + size) > rp->end)
- return -ENXIO;
- offset += hose->io_base_phys;
- }
- pr_debug(" -> mapping phys %llx\n", (unsigned long long)offset);
-
- vma->vm_pgoff = offset >> PAGE_SHIFT;
- vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
- return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
- vma->vm_end - vma->vm_start,
- vma->vm_page_prot);
-}
-
void pci_resource_to_user(const struct pci_dev *dev, int bar,
const struct resource *rsrc,
resource_size_t *start, resource_size_t *end)
Remove PCI legacy read,write and mmap access IO's on a bus Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com> --- arch/microblaze/include/asm/pci.h | 10 --- arch/microblaze/pci/pci-common.c | 140 -------------------------------------- 2 files changed, 150 deletions(-)