From patchwork Mon Nov 21 14:38:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13051149 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41229C43219 for ; Mon, 21 Nov 2022 14:40:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231754AbiKUOkg (ORCPT ); Mon, 21 Nov 2022 09:40:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49102 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231747AbiKUOiw (ORCPT ); Mon, 21 Nov 2022 09:38:52 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 460E1C8CA1; Mon, 21 Nov 2022 06:38:20 -0800 (PST) Message-ID: <20221121091327.922123028@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1669041498; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=IEK08cS7O6Uv3gBo3cg3kU1MfAmms/KMIPye21Vs0c0=; b=FOjNyluwYTVfgbUlUqvSpufgSPqPWBkjwYPpLU0srHbeiYCTZSwo7lp5CK1h5FxATnNEAo 4vCpTPc0Br1TqaIk/94fe/heYvuRWm2RayisFudNKNyYRCi9DFxnnDx5pHRrI4PmtLyktt XtLnWmZIAaM3JEXu9SGcOAAOiYxQgjOS5OnS/9maUcsIWCvlHoEh5GJukurohD9GCK1xpb 2EwBMLzcv1npoHqA+jBBKEpOpRlKm42sySIHvCjuA/myYZSW1a7zDjtUOm15Aq9ctqFOfp 7MnxHN1ZQWZv7nSLLh2sTznP9CFekTYRhAvYAiPwpR6naKlvuGEYAtVP5pxhew== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1669041498; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=IEK08cS7O6Uv3gBo3cg3kU1MfAmms/KMIPye21Vs0c0=; b=VC1cKWs2sBNafNezyRr5qwKNgCj2GyUHsobAOCxlVslC+hu/v3pASNRv4wDoPBHbOwsoq3 pK26hIf97k96nODg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe Subject: [patch V2 26/33] x86/apic/msi: Enable MSI_FLAG_PCI_MSIX_ALLOC_DYN References: <20221121083657.157152924@linutronix.de> MIME-Version: 1.0 Date: Mon, 21 Nov 2022 15:38:18 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org x86 MSI irqdomains can handle MSI-X allocation post MSI-X enable just out of the box - on the vector domain and on the remapping domains, Add the feature flag to the supported feature list Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/msi.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/arch/x86/include/asm/msi.h +++ b/arch/x86/include/asm/msi.h @@ -63,7 +63,7 @@ struct msi_msg; u32 x86_msi_msg_get_destid(struct msi_msg *msg, bool extid); #define X86_VECTOR_MSI_FLAGS_SUPPORTED \ - (MSI_GENERIC_FLAGS_MASK | MSI_FLAG_PCI_MSIX) + (MSI_GENERIC_FLAGS_MASK | MSI_FLAG_PCI_MSIX | MSI_FLAG_PCI_MSIX_ALLOC_DYN) #define X86_VECTOR_MSI_FLAGS_REQUIRED \ (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS)