| Message ID | 20221124093519.85363-1-mika.westerberg@linux.intel.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | PCI/portdrv: Do not require an interrupt for all AER capable ports | expand |
On 11/24/22 1:35 AM, Mika Westerberg wrote: > Only Root Ports and Event Collectors use MSI for AER. PCIe Switch ports > or endpoints on the other hand only send messages (that get collected by > the former). For this reason do not require PCIe switch ports and > endpoints to use interrupt if they support AER. > > This allows portdrv to attach to recent Intel PCIe switch ports that > don't declare MSI or legacy interrupts. "Recent" looks vague. Maybe you can be more specific here. Otherwise, it looks good to me. > > Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> > --- > drivers/pci/pcie/portdrv_core.c | 15 ++++++++++++++- > 1 file changed, 14 insertions(+), 1 deletion(-) > > diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c > index 1ac7fec47d6f..1b1c386e50c4 100644 > --- a/drivers/pci/pcie/portdrv_core.c > +++ b/drivers/pci/pcie/portdrv_core.c > @@ -164,7 +164,7 @@ static int pcie_port_enable_irq_vec(struct pci_dev *dev, int *irqs, int mask) > */ > static int pcie_init_service_irqs(struct pci_dev *dev, int *irqs, int mask) > { > - int ret, i; > + int ret, i, type; > > for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) > irqs[i] = -1; > @@ -177,6 +177,19 @@ static int pcie_init_service_irqs(struct pci_dev *dev, int *irqs, int mask) > if ((mask & PCIE_PORT_SERVICE_PME) && pcie_pme_no_msi()) > goto legacy_irq; > > + /* > + * Only root ports and event collectors use MSI for errors. Endpoints, > + * switch ports send messages to them but don't use MSI for that (PCIe > + * 5.0 sec 6.2.3.2). > + */ > + type = pci_pcie_type(dev); > + if ((mask & PCIE_PORT_SERVICE_AER) && > + type != PCI_EXP_TYPE_ROOT_PORT && type != PCI_EXP_TYPE_RC_EC) > + mask &= ~PCIE_PORT_SERVICE_AER; > + > + if (!mask) > + return 0; > + > /* Try to use MSI-X or MSI if supported */ > if (pcie_port_enable_irq_vec(dev, irqs, mask) == 0) > return 0;
On Sun, Nov 27, 2022 at 10:28:41PM -0800, Sathyanarayanan Kuppuswamy wrote: > > > On 11/24/22 1:35 AM, Mika Westerberg wrote: > > Only Root Ports and Event Collectors use MSI for AER. PCIe Switch ports > > or endpoints on the other hand only send messages (that get collected by > > the former). For this reason do not require PCIe switch ports and > > endpoints to use interrupt if they support AER. > > > > This allows portdrv to attach to recent Intel PCIe switch ports that > > don't declare MSI or legacy interrupts. > > "Recent" looks vague. Maybe you can be more specific here. Okay, maybe something like "This allows portdrv to attach PCIe switch ports of Intel DG1 and DG2 discrete graphics cards. These do not declare MSI or legacy interrupts." I will do this change in v2. > Otherwise, it looks good to me. Thanks!
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index 1ac7fec47d6f..1b1c386e50c4 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c @@ -164,7 +164,7 @@ static int pcie_port_enable_irq_vec(struct pci_dev *dev, int *irqs, int mask) */ static int pcie_init_service_irqs(struct pci_dev *dev, int *irqs, int mask) { - int ret, i; + int ret, i, type; for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) irqs[i] = -1; @@ -177,6 +177,19 @@ static int pcie_init_service_irqs(struct pci_dev *dev, int *irqs, int mask) if ((mask & PCIE_PORT_SERVICE_PME) && pcie_pme_no_msi()) goto legacy_irq; + /* + * Only root ports and event collectors use MSI for errors. Endpoints, + * switch ports send messages to them but don't use MSI for that (PCIe + * 5.0 sec 6.2.3.2). + */ + type = pci_pcie_type(dev); + if ((mask & PCIE_PORT_SERVICE_AER) && + type != PCI_EXP_TYPE_ROOT_PORT && type != PCI_EXP_TYPE_RC_EC) + mask &= ~PCIE_PORT_SERVICE_AER; + + if (!mask) + return 0; + /* Try to use MSI-X or MSI if supported */ if (pcie_port_enable_irq_vec(dev, irqs, mask) == 0) return 0;
Only Root Ports and Event Collectors use MSI for AER. PCIe Switch ports or endpoints on the other hand only send messages (that get collected by the former). For this reason do not require PCIe switch ports and endpoints to use interrupt if they support AER. This allows portdrv to attach to recent Intel PCIe switch ports that don't declare MSI or legacy interrupts. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> --- drivers/pci/pcie/portdrv_core.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-)