diff mbox series

PCI: loongson: Add more PCI IDs need MRRS quirk

Message ID 20230211023321.3530080-1-chenhuacai@loongson.cn (mailing list archive)
State Accepted
Delegated to: Bjorn Helgaas
Headers show
Series PCI: loongson: Add more PCI IDs need MRRS quirk | expand

Commit Message

Huacai Chen Feb. 11, 2023, 2:33 a.m. UTC 
Loongson-2K SOC and LS7A2000 chipset add new PCI IDs that need MRRS
quirk. This is a sad story, but we can only add them now.

Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
---
 drivers/pci/controller/pci-loongson.c | 33 +++++++++++++++++++--------
 1 file changed, 24 insertions(+), 9 deletions(-)

Comments

Bjorn Helgaas Feb. 13, 2023, 9:30 p.m. UTC | #1 
On Sat, Feb 11, 2023 at 10:33:21AM +0800, Huacai Chen wrote:
> Loongson-2K SOC and LS7A2000 chipset add new PCI IDs that need MRRS
> quirk. This is a sad story, but we can only add them now.
> 
> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>

Applied to pci/enumeration for v6.3, thanks!

>  drivers/pci/controller/pci-loongson.c | 33 +++++++++++++++++++--------
>  1 file changed, 24 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/pci/controller/pci-loongson.c b/drivers/pci/controller/pci-loongson.c
> index 759ec211c17b..fe0f732f6e43 100644
> --- a/drivers/pci/controller/pci-loongson.c
> +++ b/drivers/pci/controller/pci-loongson.c
> @@ -15,9 +15,14 @@
>  #include "../pci.h"
>  
>  /* Device IDs */
> -#define DEV_PCIE_PORT_0	0x7a09
> -#define DEV_PCIE_PORT_1	0x7a19
> -#define DEV_PCIE_PORT_2	0x7a29
> +#define DEV_LS2K_PCIE_PORT0	0x1a05
> +#define DEV_LS7A_PCIE_PORT0	0x7a09
> +#define DEV_LS7A_PCIE_PORT1	0x7a19
> +#define DEV_LS7A_PCIE_PORT2	0x7a29
> +#define DEV_LS7A_PCIE_PORT3	0x7a39
> +#define DEV_LS7A_PCIE_PORT4	0x7a49
> +#define DEV_LS7A_PCIE_PORT5	0x7a59
> +#define DEV_LS7A_PCIE_PORT6	0x7a69
>  
>  #define DEV_LS2K_APB	0x7a02
>  #define DEV_LS7A_GMAC	0x7a03
> @@ -53,11 +58,11 @@ static void bridge_class_quirk(struct pci_dev *dev)
>  	dev->class = PCI_CLASS_BRIDGE_PCI_NORMAL;
>  }
>  DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
> -			DEV_PCIE_PORT_0, bridge_class_quirk);
> +			DEV_LS7A_PCIE_PORT0, bridge_class_quirk);
>  DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
> -			DEV_PCIE_PORT_1, bridge_class_quirk);
> +			DEV_LS7A_PCIE_PORT1, bridge_class_quirk);
>  DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
> -			DEV_PCIE_PORT_2, bridge_class_quirk);
> +			DEV_LS7A_PCIE_PORT2, bridge_class_quirk);
>  
>  static void system_bus_quirk(struct pci_dev *pdev)
>  {
> @@ -87,11 +92,21 @@ static void loongson_mrrs_quirk(struct pci_dev *pdev)
>  	bridge->no_inc_mrrs = 1;
>  }
>  DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
> -			DEV_PCIE_PORT_0, loongson_mrrs_quirk);
> +			DEV_LS2K_PCIE_PORT0, loongson_mrrs_quirk);
>  DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
> -			DEV_PCIE_PORT_1, loongson_mrrs_quirk);
> +			DEV_LS7A_PCIE_PORT0, loongson_mrrs_quirk);
>  DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
> -			DEV_PCIE_PORT_2, loongson_mrrs_quirk);
> +			DEV_LS7A_PCIE_PORT1, loongson_mrrs_quirk);
> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
> +			DEV_LS7A_PCIE_PORT2, loongson_mrrs_quirk);
> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
> +			DEV_LS7A_PCIE_PORT3, loongson_mrrs_quirk);
> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
> +			DEV_LS7A_PCIE_PORT4, loongson_mrrs_quirk);
> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
> +			DEV_LS7A_PCIE_PORT5, loongson_mrrs_quirk);
> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
> +			DEV_LS7A_PCIE_PORT6, loongson_mrrs_quirk);
>  
>  static void loongson_pci_pin_quirk(struct pci_dev *pdev)
>  {
> -- 
> 2.39.0
>
diff mbox series

Patch

diff --git a/drivers/pci/controller/pci-loongson.c b/drivers/pci/controller/pci-loongson.c
index 759ec211c17b..fe0f732f6e43 100644
--- a/drivers/pci/controller/pci-loongson.c
+++ b/drivers/pci/controller/pci-loongson.c
@@ -15,9 +15,14 @@ 
 #include "../pci.h"
 
 /* Device IDs */
-#define DEV_PCIE_PORT_0	0x7a09
-#define DEV_PCIE_PORT_1	0x7a19
-#define DEV_PCIE_PORT_2	0x7a29
+#define DEV_LS2K_PCIE_PORT0	0x1a05
+#define DEV_LS7A_PCIE_PORT0	0x7a09
+#define DEV_LS7A_PCIE_PORT1	0x7a19
+#define DEV_LS7A_PCIE_PORT2	0x7a29
+#define DEV_LS7A_PCIE_PORT3	0x7a39
+#define DEV_LS7A_PCIE_PORT4	0x7a49
+#define DEV_LS7A_PCIE_PORT5	0x7a59
+#define DEV_LS7A_PCIE_PORT6	0x7a69
 
 #define DEV_LS2K_APB	0x7a02
 #define DEV_LS7A_GMAC	0x7a03
@@ -53,11 +58,11 @@  static void bridge_class_quirk(struct pci_dev *dev)
 	dev->class = PCI_CLASS_BRIDGE_PCI_NORMAL;
 }
 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
-			DEV_PCIE_PORT_0, bridge_class_quirk);
+			DEV_LS7A_PCIE_PORT0, bridge_class_quirk);
 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
-			DEV_PCIE_PORT_1, bridge_class_quirk);
+			DEV_LS7A_PCIE_PORT1, bridge_class_quirk);
 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
-			DEV_PCIE_PORT_2, bridge_class_quirk);
+			DEV_LS7A_PCIE_PORT2, bridge_class_quirk);
 
 static void system_bus_quirk(struct pci_dev *pdev)
 {
@@ -87,11 +92,21 @@  static void loongson_mrrs_quirk(struct pci_dev *pdev)
 	bridge->no_inc_mrrs = 1;
 }
 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
-			DEV_PCIE_PORT_0, loongson_mrrs_quirk);
+			DEV_LS2K_PCIE_PORT0, loongson_mrrs_quirk);
 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
-			DEV_PCIE_PORT_1, loongson_mrrs_quirk);
+			DEV_LS7A_PCIE_PORT0, loongson_mrrs_quirk);
 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
-			DEV_PCIE_PORT_2, loongson_mrrs_quirk);
+			DEV_LS7A_PCIE_PORT1, loongson_mrrs_quirk);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
+			DEV_LS7A_PCIE_PORT2, loongson_mrrs_quirk);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
+			DEV_LS7A_PCIE_PORT3, loongson_mrrs_quirk);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
+			DEV_LS7A_PCIE_PORT4, loongson_mrrs_quirk);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
+			DEV_LS7A_PCIE_PORT5, loongson_mrrs_quirk);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
+			DEV_LS7A_PCIE_PORT6, loongson_mrrs_quirk);
 
 static void loongson_pci_pin_quirk(struct pci_dev *pdev)
 {