| Message ID | 20230306153222.157667-14-manivannan.sadhasivam@linaro.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Qcom PCIe cleanups and improvements | expand |
On Mon, 06 Mar 2023 21:02:16 +0530, Manivannan Sadhasivam wrote: > As per Qualcomm's internal documentation, the name of the region is "mhi" > and not "mmio". So let's rename it to follow the convention. > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > Running 'make dtbs_check' with the schema in this patch gives the following warnings. Consider if they are expected or the schema is incorrect. These may not be new warnings. Note that it is not yet a requirement to have 0 warnings for dtbs_check. This will change in the future. Full log is available here: https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230306153222.157667-14-manivannan.sadhasivam@linaro.org pcie-ep@40000000: reg-names:5: 'mhi' was expected arch/arm/boot/dts/qcom-sdx55-mtp.dtb arch/arm/boot/dts/qcom-sdx55-t55.dtb arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dtb pcie-ep@40000000: Unevaluated properties are not allowed ('reg-names' was unexpected) arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dtb
On 06/03/2023 16:32, Manivannan Sadhasivam wrote: > As per Qualcomm's internal documentation, the name of the region is "mhi" > and not "mmio". So let's rename it to follow the convention. > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > index 89cfdee4b89f..c2d50f42cb4c 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > @@ -22,7 +22,7 @@ properties: > - description: External local bus interface registers > - description: Address Translation Unit (ATU) registers > - description: Memory region used to map remote RC address space > - - description: BAR memory region > + - description: MHI register region used as BAR > > reg-names: > items: > @@ -31,7 +31,7 @@ properties: > - const: elbi > - const: atu > - const: addr_space > - - const: mmio > + - const: mhi That literally breaks ABI just for convention. I don't think it's right approach. Best regards, Krzysztof
On Tue, Mar 07, 2023 at 09:18:41AM +0100, Krzysztof Kozlowski wrote: > On 06/03/2023 16:32, Manivannan Sadhasivam wrote: > > As per Qualcomm's internal documentation, the name of the region is "mhi" > > and not "mmio". So let's rename it to follow the convention. > > > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > > --- > > Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml | 6 +++--- > > 1 file changed, 3 insertions(+), 3 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > > index 89cfdee4b89f..c2d50f42cb4c 100644 > > --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > > @@ -22,7 +22,7 @@ properties: > > - description: External local bus interface registers > > - description: Address Translation Unit (ATU) registers > > - description: Memory region used to map remote RC address space > > - - description: BAR memory region > > + - description: MHI register region used as BAR > > > > reg-names: > > items: > > @@ -31,7 +31,7 @@ properties: > > - const: elbi > > - const: atu > > - const: addr_space > > - - const: mmio > > + - const: mhi > > That literally breaks ABI just for convention. I don't think it's right > approach. > Hmm. I'll drop these two patches in next revision. Thanks, Mani > Best regards, > Krzysztof >
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml index 89cfdee4b89f..c2d50f42cb4c 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml @@ -22,7 +22,7 @@ properties: - description: External local bus interface registers - description: Address Translation Unit (ATU) registers - description: Memory region used to map remote RC address space - - description: BAR memory region + - description: MHI register region used as BAR reg-names: items: @@ -31,7 +31,7 @@ properties: - const: elbi - const: atu - const: addr_space - - const: mmio + - const: mhi clocks: minItems: 7 @@ -175,7 +175,7 @@ examples: <0x40002000 0x1000>, <0x01c03000 0x3000>; reg-names = "parf", "dbi", "elbi", "atu", "addr_space", - "mmio"; + "mhi"; clocks = <&gcc GCC_PCIE_AUX_CLK>, <&gcc GCC_PCIE_CFG_AHB_CLK>,
As per Qualcomm's internal documentation, the name of the region is "mhi" and not "mmio". So let's rename it to follow the convention. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> --- Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)