Message ID | 20230308082424.140224-11-manivannan.sadhasivam@linaro.org (mailing list archive) |
---|---|
State | Not Applicable |
Delegated to: | Krzysztof WilczyĆski |
Headers | show |
Series | Add PCIe RC support to Qcom SDX55 SoC | expand |
diff --git a/arch/arm/boot/dts/qcom-sdx55-t55.dts b/arch/arm/boot/dts/qcom-sdx55-t55.dts index 5edc09af8e0d..51058b065279 100644 --- a/arch/arm/boot/dts/qcom-sdx55-t55.dts +++ b/arch/arm/boot/dts/qcom-sdx55-t55.dts @@ -278,8 +278,8 @@ nand@0 { }; &remoteproc_mpss { - status = "okay"; memory-region = <&mpss_adsp_mem>; + status = "okay"; }; &tlmm { @@ -308,16 +308,18 @@ wake-pins { }; &usb_hsphy { - status = "okay"; vdda-pll-supply = <&vreg_l4e_bb_0p875>; vdda33-supply = <&vreg_l10e_3p1>; vdda18-supply = <&vreg_l5e_bb_1p7>; + + status = "okay"; }; &usb_qmpphy { - status = "okay"; vdda-phy-supply = <&vreg_l4e_bb_0p875>; vdda-pll-supply = <&vreg_l1e_bb_1p2>; + + status = "okay"; }; &usb {