| Message ID | 20230506073139.8789-5-manivannan.sadhasivam@linaro.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | PCI: qcom: Do not advertise hotplug capability | expand |
On 06/05/2023 10:31, Manivannan Sadhasivam wrote: > SoCs making use of Qcom PCIe controller IPs v2.3.3 and v2.9.0 do not > support hotplug functionality. But the hotplug capability bit is set by > default in the hardware. This causes the kernel PCI core to register > hotplug service for the controller and send hotplug commands to it. But > those commands will timeout generating messages as below during boot > and suspend/resume. > > [ 5.782159] pcieport 0001:00:00.0: pciehp: Timeout on hotplug command 0x03c0 (issued 2020 msec ago) > [ 5.810161] pcieport 0001:00:00.0: pciehp: Timeout on hotplug command 0x03c0 (issued 2048 msec ago) > [ 7.838162] pcieport 0001:00:00.0: pciehp: Timeout on hotplug command 0x07c0 (issued 2020 msec ago) > [ 7.870159] pcieport 0001:00:00.0: pciehp: Timeout on hotplug command 0x07c0 (issued 2052 msec ago) > > This not only spams the console output but also induces a delay of a > couple of seconds. To fix this issue, let's not set the HPC bit in > PCI_EXP_SLTCAP register as a part of the post init sequence to not > advertise the hotplug capability for the controller. > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > drivers/pci/controller/dwc/pcie-qcom.c | 1 - > 1 file changed, 1 deletion(-) Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@gmail.com>
On 06/05/2023 15:01, Dmitry Baryshkov wrote: > On 06/05/2023 10:31, Manivannan Sadhasivam wrote: >> SoCs making use of Qcom PCIe controller IPs v2.3.3 and v2.9.0 do not >> support hotplug functionality. But the hotplug capability bit is set by >> default in the hardware. This causes the kernel PCI core to register >> hotplug service for the controller and send hotplug commands to it. But >> those commands will timeout generating messages as below during boot >> and suspend/resume. >> >> [ 5.782159] pcieport 0001:00:00.0: pciehp: Timeout on hotplug >> command 0x03c0 (issued 2020 msec ago) >> [ 5.810161] pcieport 0001:00:00.0: pciehp: Timeout on hotplug >> command 0x03c0 (issued 2048 msec ago) >> [ 7.838162] pcieport 0001:00:00.0: pciehp: Timeout on hotplug >> command 0x07c0 (issued 2020 msec ago) >> [ 7.870159] pcieport 0001:00:00.0: pciehp: Timeout on hotplug >> command 0x07c0 (issued 2052 msec ago) >> >> This not only spams the console output but also induces a delay of a >> couple of seconds. To fix this issue, let's not set the HPC bit in >> PCI_EXP_SLTCAP register as a part of the post init sequence to not >> advertise the hotplug capability for the controller. >> >> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> >> --- >> drivers/pci/controller/dwc/pcie-qcom.c | 1 - >> 1 file changed, 1 deletion(-) > > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@gmail.com> > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
On 5/6/2023 1:01 PM, Manivannan Sadhasivam wrote: > SoCs making use of Qcom PCIe controller IPs v2.3.3 and v2.9.0 do not > support hotplug functionality. But the hotplug capability bit is set by > default in the hardware. This causes the kernel PCI core to register > hotplug service for the controller and send hotplug commands to it. But > those commands will timeout generating messages as below during boot > and suspend/resume. > > [ 5.782159] pcieport 0001:00:00.0: pciehp: Timeout on hotplug command 0x03c0 (issued 2020 msec ago) > [ 5.810161] pcieport 0001:00:00.0: pciehp: Timeout on hotplug command 0x03c0 (issued 2048 msec ago) > [ 7.838162] pcieport 0001:00:00.0: pciehp: Timeout on hotplug command 0x07c0 (issued 2020 msec ago) > [ 7.870159] pcieport 0001:00:00.0: pciehp: Timeout on hotplug command 0x07c0 (issued 2052 msec ago) > > This not only spams the console output but also induces a delay of a > couple of seconds. To fix this issue, let's not set the HPC bit in > PCI_EXP_SLTCAP register as a part of the post init sequence to not > advertise the hotplug capability for the controller. > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > drivers/pci/controller/dwc/pcie-qcom.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c > index 00246726c21d..3d5b3ce9e2da 100644 > --- a/drivers/pci/controller/dwc/pcie-qcom.c > +++ b/drivers/pci/controller/dwc/pcie-qcom.c > @@ -140,7 +140,6 @@ > PCI_EXP_SLTCAP_AIP | \ > PCI_EXP_SLTCAP_PIP | \ > PCI_EXP_SLTCAP_HPS | \ > - PCI_EXP_SLTCAP_HPC | \ > PCI_EXP_SLTCAP_EIP | \ > PCIE_CAP_SLOT_POWER_LIMIT_VAL | \ > PCIE_CAP_SLOT_POWER_LIMIT_SCALE) Tested this in ipq9574 board and the 'timeout' messages go away with this. Tested-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> Regards, Sricharan
diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index 00246726c21d..3d5b3ce9e2da 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -140,7 +140,6 @@ PCI_EXP_SLTCAP_AIP | \ PCI_EXP_SLTCAP_PIP | \ PCI_EXP_SLTCAP_HPS | \ - PCI_EXP_SLTCAP_HPC | \ PCI_EXP_SLTCAP_EIP | \ PCIE_CAP_SLOT_POWER_LIMIT_VAL | \ PCIE_CAP_SLOT_POWER_LIMIT_SCALE)
SoCs making use of Qcom PCIe controller IPs v2.3.3 and v2.9.0 do not support hotplug functionality. But the hotplug capability bit is set by default in the hardware. This causes the kernel PCI core to register hotplug service for the controller and send hotplug commands to it. But those commands will timeout generating messages as below during boot and suspend/resume. [ 5.782159] pcieport 0001:00:00.0: pciehp: Timeout on hotplug command 0x03c0 (issued 2020 msec ago) [ 5.810161] pcieport 0001:00:00.0: pciehp: Timeout on hotplug command 0x03c0 (issued 2048 msec ago) [ 7.838162] pcieport 0001:00:00.0: pciehp: Timeout on hotplug command 0x07c0 (issued 2020 msec ago) [ 7.870159] pcieport 0001:00:00.0: pciehp: Timeout on hotplug command 0x07c0 (issued 2052 msec ago) This not only spams the console output but also induces a delay of a couple of seconds. To fix this issue, let's not set the HPC bit in PCI_EXP_SLTCAP register as a part of the post init sequence to not advertise the hotplug capability for the controller. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> --- drivers/pci/controller/dwc/pcie-qcom.c | 1 - 1 file changed, 1 deletion(-)