| Message ID | 20230512062725.1208385-3-thippeswamy.havalige@amd.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Krzysztof Wilczyński |
| Headers | show |
| Series | Add support for Xilinx XDMA Soft IP as Root Port. | expand |
On 5/12/23 08:27, Thippeswamy Havalige wrote: > Add YAML dtschemas of Xilinx XDMA Soft IP PCIe Root Port Bridge > dt binding. > > Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com> > Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@amd.com> > --- > .../devicetree/bindings/pci/xlnx,xdma-host.yaml | 117 +++++++++++++++++++++ > 1 file changed, 117 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml > > diff --git a/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml b/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml > new file mode 100644 > index 0000000..e3a1ef1 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml > @@ -0,0 +1,117 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pci/xlnx,xdma-host.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Xilinx XDMA PL PCIe Root Port Bridge > + > +maintainers: > + - Thippeswamy Havalige <thippeswamy.havalige@amd.com> > + > +allOf: > + - $ref: /schemas/pci/pci-bus.yaml# > + > +properties: > + compatible: > + const: xlnx,xdma-host-3.0 > + > + reg: > + maxItems: 1 > + > + ranges: > + items: > + - description: | > + ranges for the PCI memory regions (I/O space region is not > + supported by hardware) > + > + interrupts: > + items: > + - description: interrupt asserted when miscellaneous interrupt is received. > + - description: msi0 interrupt asserted when an MSI is received. > + - description: msi1 interrupt asserted when an MSI is received. > + > + interrupt-names: > + items: > + - const: misc > + - const: msi0 > + - const: msi1 > + > + interrupt-map-mask: > + items: > + - const: 0 > + - const: 0 > + - const: 0 > + - const: 7 > + > + interrupt-map: > + maxItems: 4 > + > + "#interrupt-cells": > + const: 1 > + > + interrupt-controller: > + description: identifies the node as an interrupt controller > + type: object > + properties: > + interrupt-controller: true > + > + "#address-cells": > + const: 0 > + > + "#interrupt-cells": > + const: 1 > + > + required: > + - interrupt-controller > + - "#address-cells" > + - "#interrupt-cells" > + > + additionalProperties: false > + > +required: > + - compatible > + - reg > + - ranges > + - interrupts > + - interrupt-map > + - interrupt-map-mask > + - "#interrupt-cells" > + - interrupt-controller > + > +unevaluatedProperties: false > + > +examples: > + > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/interrupt-controller/irq.h> > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + pcie@a0000000 { > + compatible = "xlnx,xdma-host-3.00"; This doesn't match with version listed above. And when it is fixed I am getting. /home/monstr/data/disk/linux/Documentation/devicetree/bindings/pci/xlnx,xdma-host.example.dtb: pcie@a0000000: ranges: [[33554432, 0, 2952790016, 0, 2952790016, 0, 16777216], [1124073472, 5, 0, 5, 0, 0, 16777216]] is too long From schema: /home/monstr/data/disk/linux/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml /home/monstr/data/disk/linux/Documentation/devicetree/bindings/pci/xlnx,xdma-host.example.dtb: pcie@a0000000: interrupt-map: [[0, 0, 0, 1, 2, 0, 0, 0], [0, 2, 2, 1, 0, 0, 0, 3], [2, 2, 0, 0, 0, 4, 2, 3]] is too short From schema: /home/monstr/data/disk/linux/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml /home/monstr/data/disk/linux/Documentation/devicetree/bindings/pci/xlnx,xdma-host.example.dtb: pcie@a0000000: interrupt-controller:#address-cells:0:0: 0 was expected From schema: /home/monstr/data/disk/linux/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml /home/monstr/data/disk/linux/Documentation/devicetree/bindings/pci/xlnx,xdma-host.example.dtb: pcie@a0000000: Unevaluated properties are not allowed ('interrupt-controller' was unexpected) From schema: /home/monstr/data/disk/linux/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml > + reg = <0x0 0xa0000000 0x0 0x10000000>; > + #address-cells = <3>; > + #size-cells = <2>; > + #interrupt-cells = <1>; > + device_type = "pci"; > + interrupt-parent = <&gic>; > + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "misc", "msi0", "msi1"; > + interrupt-map-mask = <0x0 0x0 0x0 0x7>; > + interrupt-map = <0 0 0 1 &pcie_intc_0 0>, > + <0 0 0 2 &pcie_intc_0 1>, > + <0 0 0 3 &pcie_intc_0 2>, > + <0 0 0 4 &pcie_intc_0 3>; > + ranges = <0x2000000 0x0 0xb0000000 0x0 0xb0000000 0x0 0x1000000>, > + <0x43000000 0x5 0x0 0x5 0x0 0x0 0x1000000>; > + pcie_intc_0: interrupt-controller { > + #address-cells = <2>; > + #interrupt-cells = <1>; > + interrupt-controller ; space is not necessary. > + }; > + }; > + }; M
On Fri, 12 May 2023 11:57:24 +0530, Thippeswamy Havalige wrote: > Add YAML dtschemas of Xilinx XDMA Soft IP PCIe Root Port Bridge > dt binding. > > Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com> > Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@amd.com> > --- > .../devicetree/bindings/pci/xlnx,xdma-host.yaml | 117 +++++++++++++++++++++ > 1 file changed, 117 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: Documentation/devicetree/bindings/pci/xlnx,xdma-host.example.dtb: /example-0/soc/pcie@a0000000: failed to match any schema with compatible: ['xlnx,xdma-host-3.00'] See https://patchwork.ozlabs.org/patch/1780383 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
diff --git a/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml b/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml new file mode 100644 index 0000000..e3a1ef1 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml @@ -0,0 +1,117 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/xlnx,xdma-host.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx XDMA PL PCIe Root Port Bridge + +maintainers: + - Thippeswamy Havalige <thippeswamy.havalige@amd.com> + +allOf: + - $ref: /schemas/pci/pci-bus.yaml# + +properties: + compatible: + const: xlnx,xdma-host-3.0 + + reg: + maxItems: 1 + + ranges: + items: + - description: | + ranges for the PCI memory regions (I/O space region is not + supported by hardware) + + interrupts: + items: + - description: interrupt asserted when miscellaneous interrupt is received. + - description: msi0 interrupt asserted when an MSI is received. + - description: msi1 interrupt asserted when an MSI is received. + + interrupt-names: + items: + - const: misc + - const: msi0 + - const: msi1 + + interrupt-map-mask: + items: + - const: 0 + - const: 0 + - const: 0 + - const: 7 + + interrupt-map: + maxItems: 4 + + "#interrupt-cells": + const: 1 + + interrupt-controller: + description: identifies the node as an interrupt controller + type: object + properties: + interrupt-controller: true + + "#address-cells": + const: 0 + + "#interrupt-cells": + const: 1 + + required: + - interrupt-controller + - "#address-cells" + - "#interrupt-cells" + + additionalProperties: false + +required: + - compatible + - reg + - ranges + - interrupts + - interrupt-map + - interrupt-map-mask + - "#interrupt-cells" + - interrupt-controller + +unevaluatedProperties: false + +examples: + + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + pcie@a0000000 { + compatible = "xlnx,xdma-host-3.00"; + reg = <0x0 0xa0000000 0x0 0x10000000>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + device_type = "pci"; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "misc", "msi0", "msi1"; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = <0 0 0 1 &pcie_intc_0 0>, + <0 0 0 2 &pcie_intc_0 1>, + <0 0 0 3 &pcie_intc_0 2>, + <0 0 0 4 &pcie_intc_0 3>; + ranges = <0x2000000 0x0 0xb0000000 0x0 0xb0000000 0x0 0x1000000>, + <0x43000000 0x5 0x0 0x5 0x0 0x0 0x1000000>; + pcie_intc_0: interrupt-controller { + #address-cells = <2>; + #interrupt-cells = <1>; + interrupt-controller ; + }; + }; + };