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Thu, 17 Aug 2023 05:11:01 -0700 Received: from xhdthippesw40.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2507.27 via Frontend Transport; Thu, 17 Aug 2023 07:10:58 -0500 From: Thippeswamy Havalige To: , , CC: , , , , , , , "Thippeswamy Havalige" , Bharat Kumar Gogada Subject: [PATCH v5 2/3] PCI: xilinx-nwl: Rename ECAM size default macro Date: Thu, 17 Aug 2023 17:40:43 +0530 Message-ID: <20230817121044.8176-4-thippeswamy.havalige@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230817121044.8176-1-thippeswamy.havalige@amd.com> References: <20230817121044.8176-1-thippeswamy.havalige@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00001506:EE_|MW4PR12MB7360:EE_ X-MS-Office365-Filtering-Correlation-Id: 3bc9c8a0-01bf-4822-852e-08db9f1b06de X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Pvh4d8auXNm2FplkL/yFH8dF/0qYOlXuLmvmRUuaouY72ZeZJq87lDF/0/qNaqLqRV89YMwwXmwfvzrdlp4okAPffWFIlCqfhtEY9URq346x+TpPnlJxERxCmLl4rx75m4bpud9dej6NDiCrihIFOprqONaDNAMFphnOSAzRrOOuWDNrn6YJjxHTwpwJNbfIHyeh/WO5gP0VwqP4KC+rg7H3dxKD56R2AQdKT8vRfph1Ie5zdakL6RHA2wMnCEVWg2xmouxsKyH6FbWjZ8DmIUuj3FiwXztGAI2HgWtkfjg9txs4C/i8exON9f+KZYeWnS+2CXhm2TxfnD9tHOqLhpPZ0V63vE1VnnO38oqVKYSj9CpVONis4mvK63oy4aDkhN5QNa3u1yEqbJ0j1/X/bqc/PKquhG7ThZPToPabL+EARaHUSadraEQALanipezEzIv5FQsRUq8KeRdGFsW8VPYdN2VScSKTwTLgwAyE36TFzDzyUHZvkpkNNwyMOAkErZzspbJ9OcMBqubbOQuPD8bYW0wVMFyV6fYvQUcjHTQQHw/RDqvVsOs8adb1HcyInpIFfzhySaPrOmldisyy0gRTAgzeW/YM3znLq3ZCYL8eBymZ5tU0Qhk7HFa43PZzVy2nOZSWupYwDAyJcA7PltUj5wWQ3ikZ0GVNsfeoL5lUBTv8FtwwW+7vI1qqfz8qKFKddMHdJoJEPrqLgY+QRPPny8p9KWLMmysYov/6VMQTvOl3vz0uCyX88BUVyV+3EvmQPsPGz1r80b47yoiNxLAd9N+kbOixfSkQd6IjtFcoDaCeD9IWPu2tq5QhD8bscivQVJsFLnf7/fqqECVVGA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(39860400002)(396003)(346002)(136003)(376002)(1800799009)(451199024)(186009)(82310400011)(46966006)(40470700004)(36840700001)(316002)(54906003)(82740400003)(356005)(110136005)(81166007)(70586007)(70206006)(5660300002)(41300700001)(36860700001)(44832011)(47076005)(4326008)(8936002)(8676002)(26005)(40460700003)(2906002)(83380400001)(40480700001)(336012)(478600001)(426003)(7416002)(86362001)(36756003)(6666004)(1076003)(2616005)(36900700001)(2101003);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Aug 2023 12:11:03.0611 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3bc9c8a0-01bf-4822-852e-08db9f1b06de X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00001506.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB7360 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Rename "NWL_ECAM_VALUE_DEFAULT" to a suitable macro name and remove redundant code Signed-off-by: Thippeswamy Havalige Signed-off-by: Bharat Kumar Gogada --- changes in v5: Remove period at end of subject line. --- drivers/pci/controller/pcie-xilinx-nwl.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c b/drivers/pci/controller/pcie-xilinx-nwl.c index d8a3a08be1d5..8fe0e8a325b0 100644 --- a/drivers/pci/controller/pcie-xilinx-nwl.c +++ b/drivers/pci/controller/pcie-xilinx-nwl.c @@ -126,7 +126,7 @@ #define E_ECAM_CR_ENABLE BIT(0) #define E_ECAM_SIZE_LOC GENMASK(20, 16) #define E_ECAM_SIZE_SHIFT 16 -#define NWL_ECAM_VALUE_DEFAULT 12 +#define NWL_ECAM_MAX_SIZE 12 #define CFG_DMA_REG_BAR GENMASK(2, 0) #define CFG_PCIE_CACHE GENMASK(7, 0) @@ -165,7 +165,6 @@ struct nwl_pcie { u32 ecam_size; int irq_intx; int irq_misc; - u32 ecam_value; struct nwl_msi msi; struct irq_domain *legacy_irq_domain; struct clk *clk; @@ -674,7 +673,7 @@ static int nwl_pcie_bridge_init(struct nwl_pcie *pcie) E_ECAM_CR_ENABLE, E_ECAM_CONTROL); nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, E_ECAM_CONTROL) | - (pcie->ecam_value << E_ECAM_SIZE_SHIFT), + (NWL_ECAM_MAX_SIZE << E_ECAM_SIZE_SHIFT), E_ECAM_CONTROL); nwl_bridge_writel(pcie, lower_32_bits(pcie->phys_ecam_base), @@ -782,7 +781,6 @@ static int nwl_pcie_probe(struct platform_device *pdev) pcie = pci_host_bridge_priv(bridge); pcie->dev = dev; - pcie->ecam_value = NWL_ECAM_VALUE_DEFAULT; err = nwl_pcie_parse_dt(pcie, pdev); if (err) {