From patchwork Thu Nov 9 19:13:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jim Quinlan X-Patchwork-Id: 13451654 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3F9CC4332F for ; Thu, 9 Nov 2023 19:14:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234809AbjKITOV (ORCPT ); Thu, 9 Nov 2023 14:14:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37792 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234808AbjKITOT (ORCPT ); Thu, 9 Nov 2023 14:14:19 -0500 Received: from mail-pj1-x1035.google.com (mail-pj1-x1035.google.com [IPv6:2607:f8b0:4864:20::1035]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C8DE03C19 for ; Thu, 9 Nov 2023 11:14:12 -0800 (PST) Received: by mail-pj1-x1035.google.com with SMTP id 98e67ed59e1d1-28037d046b0so1055259a91.3 for ; Thu, 09 Nov 2023 11:14:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1699557251; x=1700162051; darn=vger.kernel.org; h=references:in-reply-to:message-id:date:subject:cc:to:from:from:to :cc:subject:date:message-id:reply-to; bh=kMhkIiEUKQw3C/Si5kBml1FUuKIlgD/xSCHTIzP3dAs=; b=J8AnOdfphQdRuuxHP5Ywz2+E0BoLHtnj59h8P1d3BuV3NL83tAP2DATCsgw1+nMST2 qRd1euDDdSDp9QpIPtTdvxrbCaQAlkslgwi8Kacv3gzVTFWX1eZky1CW2X/FqVrkjrr0 1nyFhgcvIfdt+JY0TUIC4Aw0ahyQMb0dSinaM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699557251; x=1700162051; h=references:in-reply-to:message-id:date:subject:cc:to:from :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=kMhkIiEUKQw3C/Si5kBml1FUuKIlgD/xSCHTIzP3dAs=; b=gvoh+r06s2J6+7B7RLO88LNcTApoB7simG6p0OjoLQq2vg8rGCL61bwbhN+BFRbmTA csov6auRBN411EeswEOZ14rwOM6k0zap6hTBLZcG68gsjXfts2/IoDOBU7hg/gyD6ACA b4cyj7Qwd0lfqwUN+14yfityne0IJOlcAp7ZPz9+KaXLgph3DH/vlxlFhhbgbux3ME36 QcdirCXvvsZ2wnT1EiiUDxfMRQFFLKS1FBM3CFuXVWI86tpU/GKNJ38PLg+hfFPC+R9l AbZDCr13YOOQwHOFZzqgJHXiNQ6+wcWLtRscs26WCLAsIMM1fHI6Z46fqB1zKkTD7IF0 ApmQ== X-Gm-Message-State: AOJu0Yz5HIuFSQqmXxfKKKf3fs51erApt75qQ1z/Dd8dPYyVktMz0JPw +N7T2qZWVXZzoP2NsntpNsSgwTSTphF0Wi/cYt53HrA14Ga0db2FdMFNVOlahirqgiR+NXpZRyT tAMbDBaNmCEpuwJfavYO3/mBIPGO8GpFwd21GssWu79pEwbVqL5tg/qp/pACdvI75kMLfawDbuj 7A75rIzyeHaF45 X-Google-Smtp-Source: AGHT+IGr9VprmPbSO0Bq6pzvM7OCgl/VP1LuUfAbpUcm/xZIOExx4XrMUzb881hGGMqiWsezzj6W9w== X-Received: by 2002:a17:90a:d913:b0:280:3a0c:bf73 with SMTP id c19-20020a17090ad91300b002803a0cbf73mr2678933pjv.26.1699557251275; Thu, 09 Nov 2023 11:14:11 -0800 (PST) Received: from stbsrv-and-01.and.broadcom.net ([192.19.144.250]) by smtp.gmail.com with ESMTPSA id pj9-20020a17090b4f4900b00282ecb631a9sm124069pjb.25.2023.11.09.11.14.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Nov 2023 11:14:10 -0800 (PST) From: Jim Quinlan To: linux-pci@vger.kernel.org, Nicolas Saenz Julienne , Bjorn Helgaas , Lorenzo Pieralisi , Cyril Brulebois , Phil Elwell , bcm-kernel-feedback-list@broadcom.com, james.quinlan@broadcom.com Cc: Florian Fainelli , Jim Quinlan , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v7 3/3] PCI: brcmstb: Set higher value for internal bus timeout Date: Thu, 9 Nov 2023 14:13:54 -0500 Message-Id: <20231109191355.27738-4-james.quinlan@broadcom.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231109191355.27738-1-james.quinlan@broadcom.com> References: <20231109191355.27738-1-james.quinlan@broadcom.com> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org During long periods of the PCIe RC HW being in an L1SS sleep state, there may be a timeout on an internal bus access, even though there may not be any PCIe access involved. Such a timeout will cause a subsequent CPU abort. Signed-off-by: Jim Quinlan --- drivers/pci/controller/pcie-brcmstb.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c index f45c5d0168d3..f82a3e1a843a 100644 --- a/drivers/pci/controller/pcie-brcmstb.c +++ b/drivers/pci/controller/pcie-brcmstb.c @@ -1031,6 +1031,21 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie) return 0; } +/* + * This extends the timeout period for an access to an internal bus. This + * access timeout may occur during L1SS sleep periods, even without the + * presence of a PCIe access. + */ +static void brcm_extend_rbus_timeout(struct brcm_pcie *pcie) +{ + /* TIMEOUT register is two registers before RGR1_SW_INIT_1 */ + const unsigned int REG_OFFSET = PCIE_RGR1_SW_INIT_1(pcie) - 8; + u32 timeout_us = 4000000; /* 4 seconds, our setting for L1SS */ + + /* Each unit in timeout register is 1/216,000,000 seconds */ + writel(216 * timeout_us, pcie->base + REG_OFFSET); +} + static void brcm_config_clkreq(struct brcm_pcie *pcie) { static const char err_msg[] = "invalid 'brcm,clkreq-mode' DT string\n"; @@ -1067,6 +1082,7 @@ static void brcm_config_clkreq(struct brcm_pcie *pcie) * atypical and should happen only with older devices. */ clkreq_cntl |= PCIE_MISC_HARD_PCIE_HARD_DEBUG_L1SS_ENABLE_MASK; + brcm_extend_rbus_timeout(pcie); } else { /* * "safe" -- No power savings; refclk is driven by RC