Message ID | 20231122174856.736329-1-nks@flawful.org (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | PCI: dwc: endpoint: Fix dw_pcie_ep_raise_msix_irq() alignment support | expand |
On Wed, Nov 22, 2023 at 06:48:55PM +0100, Niklas Cassel wrote: > From: Niklas Cassel <niklas.cassel@wdc.com> > > Commit 6f5e193bfb55 ("PCI: dwc: Fix dw_pcie_ep_raise_msix_irq() to get > correct MSI-X table address") modified dw_pcie_ep_raise_msix_irq() to > support iATUs which require a specific alignment. > > However, this support cannot have been properly tested. > > The whole point is for the iATU to map an address that is aligned, > using dw_pcie_ep_map_addr(), and then let the writel() write to the > msi_address + aligned_offset. Reading this again... I wasn't super clear: s/msi_address/ep->msi_mem/ makes it more obvious that I do not mean the MSI address in the RC. > > Thus, modify the address that is mapped such that it is aligned. > With this change, dw_pcie_ep_raise_msix_irq() matches the logic in > dw_pcie_ep_raise_msi_irq(). > > Fixes: 6f5e193bfb55 ("PCI: dwc: Fix dw_pcie_ep_raise_msix_irq() to get correct MSI-X table address") > Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com> > --- > drivers/pci/controller/dwc/pcie-designware-ep.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c > index f6207989fc6a..bc94d7f39535 100644 > --- a/drivers/pci/controller/dwc/pcie-designware-ep.c > +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c > @@ -615,6 +615,7 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no, > } > > aligned_offset = msg_addr & (epc->mem->window.page_size - 1); > + msg_addr &= ~aligned_offset; > ret = dw_pcie_ep_map_addr(epc, func_no, 0, ep->msi_mem_phys, msg_addr, > epc->mem->window.page_size); > if (ret) > -- > 2.42.0 >
diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c index f6207989fc6a..bc94d7f39535 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c @@ -615,6 +615,7 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no, } aligned_offset = msg_addr & (epc->mem->window.page_size - 1); + msg_addr &= ~aligned_offset; ret = dw_pcie_ep_map_addr(epc, func_no, 0, ep->msi_mem_phys, msg_addr, epc->mem->window.page_size); if (ret)