From patchwork Thu Feb 15 15:18:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Thomas Richard X-Patchwork-Id: 13558648 Received: from relay1-d.mail.gandi.net (relay1-d.mail.gandi.net [217.70.183.193]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5A5DD137C3E; Thu, 15 Feb 2024 15:18:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.193 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708010303; cv=none; b=oBbSqc8Udzrf81qtMCnmNvvmXB4xYewOZNP6SYzWbW8cKYKN5KrboDYd7W15AJ5nbomlijMrsn2gau5aDNO77j/n3zyslgzT+Q4Jat8by+sXC/Z9p33YThHIIzHFkv072EEx2Ogz0y04QnvEU90IkyNV11epubnAYKt2f7S8xEw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708010303; c=relaxed/simple; bh=HBHasuojlZ2tGAtcznetMkoCQJdnpT5nJFFM8hFoQ5E=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Y/HJ75vIjkn6CQgD7xd1emkJcPX7bJo1hdJVAYLgovFWiIS1gtQzjYAWJNhMO+XLg70L4Atduk1jHeWSxV+n8ltZKumT9WSr0tw0dIUgz1IT5+I+LgWq3ZGxu/ktkW/QrkcyMz0uFlHFG0yyuTSUreMA4ULAhPEn9zZgBThJAR8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=MNu4P6qI; arc=none smtp.client-ip=217.70.183.193 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="MNu4P6qI" Received: by mail.gandi.net (Postfix) with ESMTPSA id 97609240007; Thu, 15 Feb 2024 15:18:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1708010299; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7WlARA5/yoLE3vqCDpUZDlZg7z0Nm6s4ziTMlbtRK8g=; b=MNu4P6qIuZ5L+2NKBXMCAIXg/mFufNUbzfb6phIdl9ZNtwvOlcvGInZcOh+9UT3LFbN4zM UN+QeiAPWP1BHJAGYSl9s/YSrH6fE49OdTK6YMfcAyLb+CyDy89eOJZNErpJYBFJZzzMZp LVa5Ds5kE35vRddMN75xSWb3jGokXMiwnp4HMEVqq6eIJyxL9pE/1mLawAUw1W6DFi/YCr 1Z2+SdExyzfFy3di/juX0CcwWv4UGDSKurTcwS8CFv31oME2EQ+wEnMr7/mh+TnDEXJAWf FhWX/1EstrMAt6OtRgChG+47AZzwia+N2UlYbE8CpkrXtGBS/mI30am/3Z/UjQ== From: Thomas Richard Date: Thu, 15 Feb 2024 16:18:03 +0100 Subject: [PATCH v3 18/18] PCI: j721e: add suspend and resume support Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240102-j7200-pcie-s2r-v3-18-5c2e4a3fac1f@bootlin.com> References: <20240102-j7200-pcie-s2r-v3-0-5c2e4a3fac1f@bootlin.com> In-Reply-To: <20240102-j7200-pcie-s2r-v3-0-5c2e4a3fac1f@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Tony Lindgren , Haojian Zhuang , Vignesh R , Aaro Koskinen , Janusz Krzysztofik , Andi Shyti , Peter Rosin , Vinod Koul , Kishon Vijay Abraham I , Philipp Zabel , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Bjorn Helgaas Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, linux-i2c@vger.kernel.org, linux-phy@lists.infradead.org, linux-pci@vger.kernel.org, gregory.clement@bootlin.com, theo.lebrun@bootlin.com, thomas.petazzoni@bootlin.com, u-kumar1@ti.com, Thomas Richard X-Mailer: b4 0.12.0 X-GND-Sasl: thomas.richard@bootlin.com From: Théo Lebrun Add suspend and resume support. Only the rc mode is supported. During the suspend stage PERST# is asserted, then deasserted during the resume stage. Signed-off-by: Théo Lebrun Signed-off-by: Thomas Richard --- drivers/pci/controller/cadence/pci-j721e.c | 90 ++++++++++++++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c index 9c588e79f5ac..cfa7ba237e1a 100644 --- a/drivers/pci/controller/cadence/pci-j721e.c +++ b/drivers/pci/controller/cadence/pci-j721e.c @@ -6,6 +6,7 @@ * Author: Kishon Vijay Abraham I */ +#include #include #include #include @@ -18,10 +19,13 @@ #include #include #include +#include #include "../../pci.h" #include "pcie-cadence.h" +#define cdns_pcie_to_rc(p) container_of(p, struct cdns_pcie_rc, pcie) + #define ENABLE_REG_SYS_2 0x108 #define STATUS_REG_SYS_2 0x508 #define STATUS_CLR_REG_SYS_2 0x708 @@ -554,6 +558,91 @@ static void j721e_pcie_remove(struct platform_device *pdev) pm_runtime_disable(dev); } +static int j721e_pcie_suspend_noirq(struct device *dev) +{ + struct j721e_pcie *pcie = dev_get_drvdata(dev); + + if (pcie->mode == PCI_MODE_RC) { + gpiod_set_value_cansleep(pcie->reset_gpio, 0); + clk_disable_unprepare(pcie->refclk); + } + + cdns_pcie_disable_phy(pcie->cdns_pcie); + + return 0; +} + +static int j721e_pcie_resume_noirq(struct device *dev) +{ + struct j721e_pcie *pcie = dev_get_drvdata(dev); + struct cdns_pcie *cdns_pcie = pcie->cdns_pcie; + int ret; + + ret = j721e_pcie_ctrl_init(pcie); + if (ret < 0) { + dev_err(dev, "j721e_pcie_ctrl_init failed\n"); + return ret; + } + + j721e_pcie_config_link_irq(pcie); + + /* + * This is not called explicitly in the probe, it is called by + * cdns_pcie_init_phy. + */ + ret = cdns_pcie_enable_phy(pcie->cdns_pcie); + if (ret < 0) { + dev_err(dev, "cdns_pcie_enable_phy failed\n"); + return -ENODEV; + } + + if (pcie->mode == PCI_MODE_RC) { + struct cdns_pcie_rc *rc = cdns_pcie_to_rc(cdns_pcie); + + ret = clk_prepare_enable(pcie->refclk); + if (ret < 0) { + dev_err(dev, "clk_prepare_enable failed\n"); + return -ENODEV; + } + + /* + * "Power Sequencing and Reset Signal Timings" table in + * PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0 + * indicates PERST# should be deasserted after minimum of 100us + * once REFCLK is stable. The REFCLK to the connector in RC + * mode is selected while enabling the PHY. So deassert PERST# + * after 100 us. + */ + if (pcie->reset_gpio) { + usleep_range(100, 200); + gpiod_set_value_cansleep(pcie->reset_gpio, 1); + } + + ret = cdns_pcie_host_link_setup(rc); + if (ret < 0) { + clk_disable_unprepare(pcie->refclk); + return ret; + } + + /* + * Reset internal status of BARs to force reinitialization in + * cdns_pcie_host_init(). + */ + for (enum cdns_pcie_rp_bar bar = RP_BAR0; bar <= RP_NO_BAR; bar++) + rc->avail_ib_bar[bar] = true; + + ret = cdns_pcie_host_init(rc); + if (ret) + return ret; + } + + return 0; +} + +static DEFINE_NOIRQ_DEV_PM_OPS(j721e_pcie_pm_ops, + j721e_pcie_suspend_noirq, + j721e_pcie_resume_noirq); + static struct platform_driver j721e_pcie_driver = { .probe = j721e_pcie_probe, .remove_new = j721e_pcie_remove, @@ -561,6 +650,7 @@ static struct platform_driver j721e_pcie_driver = { .name = "j721e-pcie", .of_match_table = of_j721e_pcie_match, .suppress_bind_attrs = true, + .pm = pm_sleep_ptr(&j721e_pcie_pm_ops), }, }; builtin_platform_driver(j721e_pcie_driver);