| Message ID | 20240108120522.1368240-1-vidyas@nvidia.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [V2] PCI/MSI: Fix MSI hwirq truncation | expand |
Thanks Vidya. Tested-By: Shanker Donthineni <sdonthineni@nvidia.com> -ShankerD On 1/8/24 06:05, Vidya Sagar wrote: > While calculating the hwirq number for an MSI interrupt, the higher > bits (i.e. from bit-5 onwards a.k.a domain_nr >= 32) of the PCI domain > number gets truncated because of the shifted value casting to u32. This > for example is resulting in same hwirq number for devices 0019:00:00.0 > and 0039:00:00.0. > > So, cast the PCI domain number to u64 before left shifting it to > calculate hwirq number. > > Fixes: 3878eaefb89a ("PCI/MSI: Enhance core to support hierarchy irqdomain") > Signed-off-by: Vidya Sagar <vidyas@nvidia.com> > --- > V2: > * Added Fixes tag > > drivers/pci/msi/irqdomain.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/pci/msi/irqdomain.c b/drivers/pci/msi/irqdomain.c > index c8be056c248d..cfd84a899c82 100644 > --- a/drivers/pci/msi/irqdomain.c > +++ b/drivers/pci/msi/irqdomain.c > @@ -61,7 +61,7 @@ static irq_hw_number_t pci_msi_domain_calc_hwirq(struct msi_desc *desc) > > return (irq_hw_number_t)desc->msi_index | > pci_dev_id(dev) << 11 | > - (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27; > + ((irq_hw_number_t)(pci_domain_nr(dev->bus) & 0xFFFFFFFF)) << 27; > } > > static void pci_msi_domain_set_desc(msi_alloc_info_t *arg,
On Mon, Jan 08 2024 at 17:35, Vidya Sagar wrote: > While calculating the hwirq number for an MSI interrupt, the higher > bits (i.e. from bit-5 onwards a.k.a domain_nr >= 32) of the PCI domain > number gets truncated because of the shifted value casting to u32. This > for example is resulting in same hwirq number for devices 0019:00:00.0 > and 0039:00:00.0. > > So, cast the PCI domain number to u64 before left shifting it to > calculate hwirq number. > > Fixes: 3878eaefb89a ("PCI/MSI: Enhance core to support hierarchy irqdomain") > Signed-off-by: Vidya Sagar <vidyas@nvidia.com> > --- > V2: > * Added Fixes tag > > drivers/pci/msi/irqdomain.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/pci/msi/irqdomain.c b/drivers/pci/msi/irqdomain.c > index c8be056c248d..cfd84a899c82 100644 > --- a/drivers/pci/msi/irqdomain.c > +++ b/drivers/pci/msi/irqdomain.c > @@ -61,7 +61,7 @@ static irq_hw_number_t pci_msi_domain_calc_hwirq(struct msi_desc *desc) > > return (irq_hw_number_t)desc->msi_index | > pci_dev_id(dev) << 11 | > - (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27; > + ((irq_hw_number_t)(pci_domain_nr(dev->bus) & 0xFFFFFFFF)) << 27; This is not casting to u64. It's casting to unsigned long: typedef unsigned long irq_hw_number_t; So this works only correctly on 64bit. On 32bit kernels unsigned long is still 32bit. It's probably arguable that the 32bit case is not a problem, but the changelog and the change do not match. This needs a proper explanation why we don't care about this on 32bit. Thanks, tglx
On 1/10/2024 3:42 PM, Thomas Gleixner wrote: > External email: Use caution opening links or attachments > > > On Mon, Jan 08 2024 at 17:35, Vidya Sagar wrote: > >> While calculating the hwirq number for an MSI interrupt, the higher >> bits (i.e. from bit-5 onwards a.k.a domain_nr >= 32) of the PCI domain >> number gets truncated because of the shifted value casting to u32. This >> for example is resulting in same hwirq number for devices 0019:00:00.0 >> and 0039:00:00.0. >> >> So, cast the PCI domain number to u64 before left shifting it to >> calculate hwirq number. >> >> Fixes: 3878eaefb89a ("PCI/MSI: Enhance core to support hierarchy irqdomain") >> Signed-off-by: Vidya Sagar <vidyas@nvidia.com> >> --- >> V2: >> * Added Fixes tag >> >> drivers/pci/msi/irqdomain.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/pci/msi/irqdomain.c b/drivers/pci/msi/irqdomain.c >> index c8be056c248d..cfd84a899c82 100644 >> --- a/drivers/pci/msi/irqdomain.c >> +++ b/drivers/pci/msi/irqdomain.c >> @@ -61,7 +61,7 @@ static irq_hw_number_t pci_msi_domain_calc_hwirq(struct msi_desc *desc) >> >> return (irq_hw_number_t)desc->msi_index | >> pci_dev_id(dev) << 11 | >> - (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27; >> + ((irq_hw_number_t)(pci_domain_nr(dev->bus) & 0xFFFFFFFF)) << 27; > > This is not casting to u64. It's casting to unsigned long: > > typedef unsigned long irq_hw_number_t; > > So this works only correctly on 64bit. On 32bit kernels unsigned long is > still 32bit. It's probably arguable that the 32bit case is not a > problem, but the changelog and the change do not match. This needs a > proper explanation why we don't care about this on 32bit. Agree that the change and the commit message do not match. I'll update the commit message to use 'irq_hw_number_t' instead of u64. Thanks, Vidya Sagar > > Thanks, > > tglx
diff --git a/drivers/pci/msi/irqdomain.c b/drivers/pci/msi/irqdomain.c index c8be056c248d..cfd84a899c82 100644 --- a/drivers/pci/msi/irqdomain.c +++ b/drivers/pci/msi/irqdomain.c @@ -61,7 +61,7 @@ static irq_hw_number_t pci_msi_domain_calc_hwirq(struct msi_desc *desc) return (irq_hw_number_t)desc->msi_index | pci_dev_id(dev) << 11 | - (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27; + ((irq_hw_number_t)(pci_domain_nr(dev->bus) & 0xFFFFFFFF)) << 27; } static void pci_msi_domain_set_desc(msi_alloc_info_t *arg,
While calculating the hwirq number for an MSI interrupt, the higher bits (i.e. from bit-5 onwards a.k.a domain_nr >= 32) of the PCI domain number gets truncated because of the shifted value casting to u32. This for example is resulting in same hwirq number for devices 0019:00:00.0 and 0039:00:00.0. So, cast the PCI domain number to u64 before left shifting it to calculate hwirq number. Fixes: 3878eaefb89a ("PCI/MSI: Enhance core to support hierarchy irqdomain") Signed-off-by: Vidya Sagar <vidyas@nvidia.com> --- V2: * Added Fixes tag drivers/pci/msi/irqdomain.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)