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Mon, 8 Jan 2024 04:05:25 -0800 From: Vidya Sagar To: , , , , CC: , , , , , , , , Subject: [PATCH V2] PCI/MSI: Fix MSI hwirq truncation Date: Mon, 8 Jan 2024 17:35:22 +0530 Message-ID: <20240108120522.1368240-1-vidyas@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240105134339.3091497-1-vidyas@nvidia.com> References: <20240105134339.3091497-1-vidyas@nvidia.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044F6:EE_|SA3PR12MB7858:EE_ X-MS-Office365-Filtering-Correlation-Id: 992b9061-ad0d-4bae-a245-08dc104227e4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 8rkGlBI1ZVW5BeCVMGttaIcw496pFSIgYijas2OD5jTp+wmkKupA9/ygP7M37y9HLi/nUK6EglnvIsmthRr4uaLVKrWVEbfq/r6LXT0cOzUSspaGgapHveptjUEXaEWJ4SbIufzlZZfO9c2n8UftGpzItv7uJkwg9G+/IN+H+Tyxy5hvuzoozmElQtQnddh5bjof3JjnfaJUQluLEszbr/COHLWQdX/q2tdXl9qwQzI/CWdaFmI3u1R0G9UhmBB4MB4sgI4nN2O3j/I2rJBPpbSC4ONmKV9lt1Zgzpf/ibaoJ/2vgRkt8sNgClzztKNvu3F+DxgTr5Nq99OPKpWwn0v8W37Vu2LuUpC9Gy1tsLEcRPKo2T5Hcs4COWnh7lAk+Jwnu6Vuh9WQ3+cyvgu5yD2DLmtrfS6L/eGRzA4edpduWgT1Kqx4X456HLBrcIjB5nv4+iOVVdkL+g5YLL5LTj0ViXo6EMBk73V3Mlmt3tv6jAKUNPHJddDDLNYL4K941qRV9MbqTDMg1L5TclzGcg3BLnA+22mQ7sJ/I3+JyPefimcL2klUrTxXNTta06kbEPTUKTbDT1fCTq/Af/Ps77w1flEGJJkvGBLchUu+Ky0YH1FR31aoLggvyG9/srJ3swjQ/iIjyfC/DeHVb++GURRAFujiYBbDH49gPSfhx9bvPNv+VRQyR1nnHgEzJwGVdmZK/osMXIQCue2X65rigsb/jZCBeyJVHkY9bTm3fcU+gh7upv1+EdqsGa5glUoa X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230031)(4636009)(396003)(136003)(39860400002)(376002)(346002)(230922051799003)(451199024)(1800799012)(64100799003)(82310400011)(186009)(46966006)(40470700004)(36840700001)(83380400001)(40460700003)(336012)(1076003)(26005)(40480700001)(47076005)(36860700001)(5660300002)(4326008)(426003)(7696005)(2616005)(82740400003)(7636003)(356005)(6666004)(478600001)(110136005)(54906003)(316002)(70586007)(70206006)(8936002)(8676002)(36756003)(41300700001)(86362001)(2906002);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Jan 2024 12:05:50.1542 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 992b9061-ad0d-4bae-a245-08dc104227e4 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F6.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB7858 While calculating the hwirq number for an MSI interrupt, the higher bits (i.e. from bit-5 onwards a.k.a domain_nr >= 32) of the PCI domain number gets truncated because of the shifted value casting to u32. This for example is resulting in same hwirq number for devices 0019:00:00.0 and 0039:00:00.0. So, cast the PCI domain number to u64 before left shifting it to calculate hwirq number. Fixes: 3878eaefb89a ("PCI/MSI: Enhance core to support hierarchy irqdomain") Signed-off-by: Vidya Sagar Tested-By: Shanker Donthineni --- V2: * Added Fixes tag drivers/pci/msi/irqdomain.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/msi/irqdomain.c b/drivers/pci/msi/irqdomain.c index c8be056c248d..cfd84a899c82 100644 --- a/drivers/pci/msi/irqdomain.c +++ b/drivers/pci/msi/irqdomain.c @@ -61,7 +61,7 @@ static irq_hw_number_t pci_msi_domain_calc_hwirq(struct msi_desc *desc) return (irq_hw_number_t)desc->msi_index | pci_dev_id(dev) << 11 | - (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27; + ((irq_hw_number_t)(pci_domain_nr(dev->bus) & 0xFFFFFFFF)) << 27; } static void pci_msi_domain_set_desc(msi_alloc_info_t *arg,