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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?8UNJyrJqCDzlTJ8ANuCZeFbDZbkr?= =?utf-8?q?sti2h6ENVe/kUPLcD6+LslH5zz7jwTZr1c2l3Zl114by5vPb6fXYwzYiFkhnMdgiN?= =?utf-8?q?IB+Nw9fTejidqQsCmK0sFIXvA4eKqET0Fl6X3DtGAW2Q8kg3hSuYhpZXf8b+ZEV9l?= =?utf-8?q?3iNQ4y4qiUCloFONYbW92ncZi1nf9prTbSkLzQlmTa8K8VC3Unjm8oKlSuoTHKkFA?= =?utf-8?q?L4iToxPY3gJ2TxiZKcdD3SqXaAEcvuiWpiHr9EaaK14nzYwTaz9fse3ACl2dCg53H?= =?utf-8?q?mTuJoq4AI9QbYkeJKJ+5lagdya2Gq3JeWbLtlky96zsg6mRtpsdbVBYCDfQ2XOfAA?= =?utf-8?q?hc7erPfwpqWMZR07rJlLA8lKhfrbUTdgKwJ/yMDJv28wfoCUs1eRY8TgaMirrvGXK?= =?utf-8?q?NoNGrvDYsVWelLwgYq31cDWYaKzg9M/P3t81lk9JdY3VLVf/awu+ZND07vIzueE9F?= =?utf-8?q?48iuutn4UTCe+4Ipp5VBC0BMcZbfeoDitbom+TiNi/LbrXuGVoIeee6DM+07MLh7F?= =?utf-8?q?EiHLjQlN8BusZQeGFiWl/1A0M8rKB+Zk51RBqtzSiA+8JhP+BkLm6sjj8bQ8WVEOr?= =?utf-8?q?01+fwBNCa6Oa2vHtrH8+2pjDTA1smJdGkK7t/SItWrTdQD+AXToc2oLiUoi0gYUgK?= =?utf-8?q?M9rcPUMfVUKaJj0lFmT+MCj4LlMIyf7xj2GYpZTxClHafKTXJtPhzdFZMvwgmtkU1?= =?utf-8?q?1q0/944dKDuNjTEf4w4BJQ0tSyDUZOutAiN0jTAhzpBJFAAFSGUTBeDUKgagW5zKp?= =?utf-8?q?1XuW17iafUVkQGEgO8KSu7Xi9FQW3SXIjv1MakCPmW4+0+NUufKsVr2DrLJ3csMbP?= =?utf-8?q?PbY7ZJ4SUWEB1lUjhZpdTM3hH3Fdw0TTC1SuA7+18o0mzmFR7wRQ15biSGUWQr3Mw?= =?utf-8?q?TFKP1jeASw0U0wkdPWl74vmv0jq+/9dYaE38U+7Mjc+MuFncs5gFQHSZ+iR8w3VJL?= =?utf-8?q?OLiqShhgi9yjLeNOojejTw6rYHlJcWRk6epUYAafXE5vFwFZ00aaXnJ4VplV6qj+y?= =?utf-8?q?25Y8DlsILxEaJsrGe55cT46CeMPLFMS9elBsFDao2jXhbfelPS/fV5+k1RAbRjeN/?= =?utf-8?q?ASL15x2up84x0KKKDr/qvvAIzphRD+xZY3fCyuX+RIsTxk9jVN95ujxDkTHN/h6n4?= =?utf-8?q?G7s5VzAQQITLSsjwdlIDUhr4ZIRrvk4CCAG/FZnGExR8lyMiBnzd2tR6mxIRmrdmz?= =?utf-8?q?GpV9W+pKX25ZQuGquF4PvCUCH/sPgrVgb/xO5Bl/888iXVDiBwADDn+oiIYe2d4RV?= =?utf-8?q?Q4KwcmTeeEJTw7lB6P08eqON3t8oHGVnPPH2W46EqGPBri5+G5rNg2qAXnM0ikcY4?= =?utf-8?q?eVScdhIMm3MG5iGU4HW2Z3risJkzSP380XmEUYfkM6kEeNNN1rZu2QiNJwqwoGWcw?= =?utf-8?q?Tx9MqdTjZZbMQL4bQo06FXOg4/SbrJZSIzB0VQCjIbhEdUsapPrOpAq1jjZj+9fW6?= =?utf-8?q?duCAf8JycFbkdJvyhXoxc1t9rI/WB13J7mXbYp3sb2BJliJM1a8XhgH8=3D?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0187632e-e5c4-4717-052c-08dc2340ca42 X-MS-Exchange-CrossTenant-AuthSource: PAXPR04MB9642.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Feb 2024 16:13:55.9192 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: IdrLjNZjHVTB8FF4kTvUk4jFWp2T4ZpumpT1s4DP+fiMhSMfTJxDM08z6K3wUQu9cymxYRSW8u4c5utp+5Dq/Q== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR04MB9110 From: Yoshihiro Shimoda Add "code" and "routing" into struct dw_pcie_ob_atu_cfg for triggering INTx IRQs by iATU in the PCIe endpoint mode in near the future. PCIE_ATU_INHIBIT_PAYLOAD is set to issue TLP type of Msg instead of MsgD. So, this implementation supports the data-less messages only for now. Signed-off-by: Yoshihiro Shimoda Reviewed-by: Serge Semin Reviewed-by: Manivannan Sadhasivam Signed-off-by: Frank Li --- drivers/pci/controller/dwc/pcie-designware.c | 9 +++++++-- drivers/pci/controller/dwc/pcie-designware.h | 4 ++++ 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c index df2575ec5f44c..ba909fade9db1 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c @@ -499,7 +499,7 @@ int dw_pcie_prog_outbound_atu(struct dw_pcie *pci, dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_UPPER_TARGET, upper_32_bits(atu->pci_addr)); - val = atu->type | PCIE_ATU_FUNC_NUM(atu->func_no); + val = atu->type | atu->routing | PCIE_ATU_FUNC_NUM(atu->func_no); if (upper_32_bits(limit_addr) > upper_32_bits(cpu_addr) && dw_pcie_ver_is_ge(pci, 460A)) val |= PCIE_ATU_INCREASE_REGION_SIZE; @@ -507,7 +507,12 @@ int dw_pcie_prog_outbound_atu(struct dw_pcie *pci, val = dw_pcie_enable_ecrc(val); dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL1, val); - dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL2, PCIE_ATU_ENABLE); + val = PCIE_ATU_ENABLE; + if (atu->type == PCIE_ATU_TYPE_MSG) { + /* The data-less messages only for now */ + val |= PCIE_ATU_INHIBIT_PAYLOAD | atu->code; + } + dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL2, val); /* * Make sure ATU enable takes effect before any subsequent config diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index d21db82e586d5..703b50bc5e0f1 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -148,11 +148,13 @@ #define PCIE_ATU_TYPE_IO 0x2 #define PCIE_ATU_TYPE_CFG0 0x4 #define PCIE_ATU_TYPE_CFG1 0x5 +#define PCIE_ATU_TYPE_MSG 0x10 #define PCIE_ATU_TD BIT(8) #define PCIE_ATU_FUNC_NUM(pf) ((pf) << 20) #define PCIE_ATU_REGION_CTRL2 0x004 #define PCIE_ATU_ENABLE BIT(31) #define PCIE_ATU_BAR_MODE_ENABLE BIT(30) +#define PCIE_ATU_INHIBIT_PAYLOAD BIT(22) #define PCIE_ATU_FUNC_NUM_MATCH_EN BIT(19) #define PCIE_ATU_LOWER_BASE 0x008 #define PCIE_ATU_UPPER_BASE 0x00C @@ -303,6 +305,8 @@ struct dw_pcie_ob_atu_cfg { int index; int type; u8 func_no; + u8 code; + u8 routing; u64 cpu_addr; u64 pci_addr; u64 size;