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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?UTxQ7E+E1b0XXogwmbHcIa2/Kotr?= =?utf-8?q?46jW/MR7JRj2NFiwb+NQ56NEhWbJtWAZO/HnsqYs259X6Z+u4myNAWYETpJZdykU8?= =?utf-8?q?2odkJnE3OC3B0V4hl5/sZmiNdYVyK8EIvjKkHXbLdOR/S6iZTWCAcgi/G6/u5OLxr?= =?utf-8?q?zTRB7S8OA4lw6CZ/wwBZEHbZV7/vEeTVEXGJqBu3eIZwarj3UdBzRSVUEby+xKaTS?= =?utf-8?q?aWuXTb/ysbSjRCWJR2dNpYJA1HaO+GHcccH0Br6gooPfUrMBL3RdVRpnwV0Q3R65v?= =?utf-8?q?imDtxzJE90IKSapr7YgHe9mSLlEgy+0ewvTTriJLPkpcsmAPAj3mC4ItH9/SP9ZzO?= =?utf-8?q?8PhX0kRsjh9c4rsR+CdIK2DC5TnUTaWyeQ19Bk2uFd8icgdAVJRGxp6TWUxORQ39h?= =?utf-8?q?e+0gZ0MscUDSerzMSsk1bLOrUY2gdD3nAWd3y3Mb1yJXuWS96ot5ALH/fGUgpSDdO?= =?utf-8?q?tMXqsbYRiOfyh6IrP5Elop3mHMJxl8Ta70O5dAEYpK4phiZVlvmYVXArqXCSQ37sH?= =?utf-8?q?/wrwvknS6NNTXZfEo16oFcwGQbZQc/w33zeQuhsQsPJ5fYvXlHyoju+fYC1aGSffW?= =?utf-8?q?opU9AiuhG3kuugTRfkAuYceTcYj7gg/PH9LGW0Yqe2G67LMrZymuLVqrT5+2k42bT?= =?utf-8?q?uDeWRlNOMC12dy6m6zO8+ScLEvt1+u+BLFLmoCCXa3CXTKGgeLmtzfaSEkBOeD3Jf?= =?utf-8?q?s005K5LPORX/VO1TGab5wh+Y8nMZiD3HOOchiQIgOyaq5GmYJlC+KCy+rLmoiLaxj?= =?utf-8?q?ZqInHOZaS+xvtV4Ya8R075aLWu8nRZV1cZaRqRwlKnimkHLmHv3n1LkNOZAMaWgBH?= =?utf-8?q?EypObIyEcBn6MfqyGz1FfscfPTG+jCqB8BTQQug7CN15wxgEDMWXB9X/StNJaspdD?= =?utf-8?q?6Nu/DMUQX+vxEBHnvptWCzTnwomjrzZHzOqcIWKrhM7otSvisfCEkd37QZ6SMPDYM?= =?utf-8?q?nef2OZbH5nSZY8udC8WRSjAcU68pET9V3qV6GnXqf+qp6pOa/7uX7aP9EI4O2P/4i?= =?utf-8?q?JVfpvzFMuBKaIj+bbtHdZPZ7ZCyfmBwqmgQq+EM/+pMBAcVFJKD0Fy5uN9oR5xEAY?= =?utf-8?q?s5KiPMkVKX/0QqKLtJtyRg/Ej4YyE6OqlOzHp/F8D+O23y+7KgceeLAq01TMRP6iF?= =?utf-8?q?pWzG/kwhSyPqE0goQgPWM/spEo9FEQU26h4QZLwceizIBi+PUaDJILlz5RyXmYr/f?= =?utf-8?q?dIYrwl6T0skd3ZahI2pfUpXnWPmqwpXsL2S1UoI7n0GvE08r45rNJbN3mbebA13Jw?= =?utf-8?q?MpsiSFo7bTpQKBKtHWiyXA3veTzTrZeFAH/821vnXQB/S9xfOBigNJPauwP/bZFR4?= =?utf-8?q?ajn6E8XtnLt4Vsw1QAHrP6ImvEifVQPvNrUE8MlBChPlmU3L1HFZY1mysqEYWMnie?= =?utf-8?q?fEz8/RKEhXpLGTOgojy4tEhgNX4SOpcsfWhfMxJJZzbnfx35fgce/wLUjQ5r+pPUK?= =?utf-8?q?ZLPJnlDQ5F+bnjX/xuG4Ej2AFY7WjD9Qyz4C1PqALIH6quWfu01Hhi5tT5jZatGVo?= =?utf-8?q?lB2QYjA0S7WQ?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 11940b29-59e8-44b4-ae2a-08dc2cddeb13 X-MS-Exchange-CrossTenant-AuthSource: PAXPR04MB9642.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Feb 2024 21:51:22.3824 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: VjzVrnooN4dygRTKG7sEad0z7jPsfLQrzmWsxNA8nwNGzB1olfFfHYlPKwHlmQ7LmSuHk10hLrDmw4XfSFGPVw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU2PR04MB8837 From: Yoshihiro Shimoda Add "code" and "routing" into struct dw_pcie_ob_atu_cfg for triggering INTx IRQs by iATU in the PCIe endpoint mode in near the future. PCIE_ATU_INHIBIT_PAYLOAD is set to issue TLP type of Msg instead of MsgD. So, this implementation supports the data-less messages only for now. Signed-off-by: Yoshihiro Shimoda Reviewed-by: Serge Semin Reviewed-by: Manivannan Sadhasivam Signed-off-by: Frank Li --- drivers/pci/controller/dwc/pcie-designware.c | 9 +++++++-- drivers/pci/controller/dwc/pcie-designware.h | 4 ++++ 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c index df2575ec5f44c..ba909fade9db1 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c @@ -499,7 +499,7 @@ int dw_pcie_prog_outbound_atu(struct dw_pcie *pci, dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_UPPER_TARGET, upper_32_bits(atu->pci_addr)); - val = atu->type | PCIE_ATU_FUNC_NUM(atu->func_no); + val = atu->type | atu->routing | PCIE_ATU_FUNC_NUM(atu->func_no); if (upper_32_bits(limit_addr) > upper_32_bits(cpu_addr) && dw_pcie_ver_is_ge(pci, 460A)) val |= PCIE_ATU_INCREASE_REGION_SIZE; @@ -507,7 +507,12 @@ int dw_pcie_prog_outbound_atu(struct dw_pcie *pci, val = dw_pcie_enable_ecrc(val); dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL1, val); - dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL2, PCIE_ATU_ENABLE); + val = PCIE_ATU_ENABLE; + if (atu->type == PCIE_ATU_TYPE_MSG) { + /* The data-less messages only for now */ + val |= PCIE_ATU_INHIBIT_PAYLOAD | atu->code; + } + dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL2, val); /* * Make sure ATU enable takes effect before any subsequent config diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index d21db82e586d5..703b50bc5e0f1 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -148,11 +148,13 @@ #define PCIE_ATU_TYPE_IO 0x2 #define PCIE_ATU_TYPE_CFG0 0x4 #define PCIE_ATU_TYPE_CFG1 0x5 +#define PCIE_ATU_TYPE_MSG 0x10 #define PCIE_ATU_TD BIT(8) #define PCIE_ATU_FUNC_NUM(pf) ((pf) << 20) #define PCIE_ATU_REGION_CTRL2 0x004 #define PCIE_ATU_ENABLE BIT(31) #define PCIE_ATU_BAR_MODE_ENABLE BIT(30) +#define PCIE_ATU_INHIBIT_PAYLOAD BIT(22) #define PCIE_ATU_FUNC_NUM_MATCH_EN BIT(19) #define PCIE_ATU_LOWER_BASE 0x008 #define PCIE_ATU_UPPER_BASE 0x00C @@ -303,6 +305,8 @@ struct dw_pcie_ob_atu_cfg { int index; int type; u8 func_no; + u8 code; + u8 routing; u64 cpu_addr; u64 pci_addr; u64 size;