| Message ID | 20240219-runtime_pm_enable-v1-1-d39660310504@quicinc.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Manivannan Sadhasivam |
| Headers | show |
| Series | PCI: dwc: Enable runtime pm of the host bridge | expand |
On Mon, Feb 19, 2024 at 06:51:10PM +0530, Krishna chaitanya chundru wrote: > Currently controller driver goes to runtime suspend irrespective > of the child(pci-pci bridge & endpoint driver) runtime state. > This is because the runtime pm is not being enabled for the host > bridge dev which maintains parent child relationship. > You should describe the parent-child topology first. Maybe a simple flow like below will help: PCIe Controller | PCIe Host bridge | PCI-PCI bridge | PCIe endpoint Also explain the fact that since runtime PM is disabled for host bridge, the state of the child devices under the host bridge is not taken into account by PM framework for the top level parent, PCIe controller. So PM framework, allows the controller driver to enter runtime PM irrespective of the state of the devices under the host bridge. And this causes the topology breakage and also possible PM issues. - Mani > So enable pm runtime for the host bridge, so that controller driver > goes to suspend only when all child devices goes to runtime suspend. > > Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com> > --- > drivers/pci/controller/dwc/pcie-designware-host.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c > index d5fc31f8345f..57756a73df30 100644 > --- a/drivers/pci/controller/dwc/pcie-designware-host.c > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c > @@ -16,6 +16,7 @@ > #include <linux/of_pci.h> > #include <linux/pci_regs.h> > #include <linux/platform_device.h> > +#include <linux/pm_runtime.h> > > #include "../../pci.h" > #include "pcie-designware.h" > @@ -505,6 +506,9 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp) > if (pp->ops->post_init) > pp->ops->post_init(pp); > > + pm_runtime_set_active(&bridge->dev); > + pm_runtime_enable(&bridge->dev); > + > return 0; > > err_stop_link: > > --- > base-commit: 6613476e225e090cc9aad49be7fa504e290dd33d > change-id: 20240219-runtime_pm_enable-bdc17914bd50 > > Best regards, > -- > Krishna chaitanya chundru <quic_krichai@quicinc.com> >
On 2/26/2024 9:23 PM, Manivannan Sadhasivam wrote: > On Mon, Feb 19, 2024 at 06:51:10PM +0530, Krishna chaitanya chundru wrote: >> Currently controller driver goes to runtime suspend irrespective >> of the child(pci-pci bridge & endpoint driver) runtime state. >> This is because the runtime pm is not being enabled for the host >> bridge dev which maintains parent child relationship. >> > > You should describe the parent-child topology first. Maybe a simple flow like > below will help: > > PCIe Controller > | > PCIe Host bridge > | > PCI-PCI bridge > | > PCIe endpoint > > Also explain the fact that since runtime PM is disabled for host bridge, the > state of the child devices under the host bridge is not taken into account by > PM framework for the top level parent, PCIe controller. So PM framework, allows > the controller driver to enter runtime PM irrespective of the state of the > devices under the host bridge. And this causes the topology breakage and also > possible PM issues. > > - Mani > ACK. - Krishna Chaitanya. >> So enable pm runtime for the host bridge, so that controller driver >> goes to suspend only when all child devices goes to runtime suspend. >> >> Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com> >> --- >> drivers/pci/controller/dwc/pcie-designware-host.c | 4 ++++ >> 1 file changed, 4 insertions(+) >> >> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c >> index d5fc31f8345f..57756a73df30 100644 >> --- a/drivers/pci/controller/dwc/pcie-designware-host.c >> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c >> @@ -16,6 +16,7 @@ >> #include <linux/of_pci.h> >> #include <linux/pci_regs.h> >> #include <linux/platform_device.h> >> +#include <linux/pm_runtime.h> >> >> #include "../../pci.h" >> #include "pcie-designware.h" >> @@ -505,6 +506,9 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp) >> if (pp->ops->post_init) >> pp->ops->post_init(pp); >> >> + pm_runtime_set_active(&bridge->dev); >> + pm_runtime_enable(&bridge->dev); >> + >> return 0; >> >> err_stop_link: >> >> --- >> base-commit: 6613476e225e090cc9aad49be7fa504e290dd33d >> change-id: 20240219-runtime_pm_enable-bdc17914bd50 >> >> Best regards, >> -- >> Krishna chaitanya chundru <quic_krichai@quicinc.com> >> >
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index d5fc31f8345f..57756a73df30 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -16,6 +16,7 @@ #include <linux/of_pci.h> #include <linux/pci_regs.h> #include <linux/platform_device.h> +#include <linux/pm_runtime.h> #include "../../pci.h" #include "pcie-designware.h" @@ -505,6 +506,9 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp) if (pp->ops->post_init) pp->ops->post_init(pp); + pm_runtime_set_active(&bridge->dev); + pm_runtime_enable(&bridge->dev); + return 0; err_stop_link:
Currently controller driver goes to runtime suspend irrespective of the child(pci-pci bridge & endpoint driver) runtime state. This is because the runtime pm is not being enabled for the host bridge dev which maintains parent child relationship. So enable pm runtime for the host bridge, so that controller driver goes to suspend only when all child devices goes to runtime suspend. Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com> --- drivers/pci/controller/dwc/pcie-designware-host.c | 4 ++++ 1 file changed, 4 insertions(+) --- base-commit: 6613476e225e090cc9aad49be7fa504e290dd33d change-id: 20240219-runtime_pm_enable-bdc17914bd50 Best regards,