diff mbox series

Revert "PCI: Mark LSI FW643 to avoid bus reset"

Message ID 20240328212302.1582483-1-helgaas@kernel.org (mailing list archive)
State Accepted
Commit 8afe654be92796fbc79320bcf4980de4ac19430f
Headers show
Series Revert "PCI: Mark LSI FW643 to avoid bus reset" | expand

Commit Message

Bjorn Helgaas March 28, 2024, 9:23 p.m. UTC 
From: Bjorn Helgaas <bhelgaas@google.com>

This reverts commit 29a43dc130ce65d365a8ea9e1cc4bc51005a353e.

29a43dc130ce ("PCI: Mark LSI FW643 to avoid bus reset") by Edmund was based
on the assumption that the LSI / Agere FW643 has a defect such that it
can't recover after a Secondary Bus Reset (SBR).

But Takashi Sakamoto reported that SBR works fine on this same FW643 device
in an AMD Ryzen 5 2400G system, so apparently there is some other aspect of
Edmund's system that accounts for the issue.

The down side of 29a43dc130ce is that when the FW643 is assigned to a VM,
avoiding the SBR means we leak data out of the VM.

Revert 29a43dc130ce until we figure out a better solution.  In the
meantime, we can use the sysfs "reset_method" interface to restrict the
available reset methods.

Fixes: 29a43dc130ce ("PCI: Mark LSI FW643 to avoid bus reset")
Reported-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
Link: https://lore.kernel.org/r/20240325012135.36861-1-o-takashi@sakamocchi.jp
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
 drivers/pci/quirks.c | 8 --------
 1 file changed, 8 deletions(-)

Comments

Takashi Sakamoto March 29, 2024, 8:04 a.m. UTC | #1 
On Thu, Mar 28, 2024 at 04:23:02PM -0500, Bjorn Helgaas wrote:
> From: Bjorn Helgaas <bhelgaas@google.com>
> 
> This reverts commit 29a43dc130ce65d365a8ea9e1cc4bc51005a353e.
> 
> 29a43dc130ce ("PCI: Mark LSI FW643 to avoid bus reset") by Edmund was based
> on the assumption that the LSI / Agere FW643 has a defect such that it
> can't recover after a Secondary Bus Reset (SBR).
> 
> But Takashi Sakamoto reported that SBR works fine on this same FW643 device
> in an AMD Ryzen 5 2400G system, so apparently there is some other aspect of
> Edmund's system that accounts for the issue.
> 
> The down side of 29a43dc130ce is that when the FW643 is assigned to a VM,
> avoiding the SBR means we leak data out of the VM.
> 
> Revert 29a43dc130ce until we figure out a better solution.  In the
> meantime, we can use the sysfs "reset_method" interface to restrict the
> available reset methods.
> 
> Fixes: 29a43dc130ce ("PCI: Mark LSI FW643 to avoid bus reset")
> Reported-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
> Link: https://lore.kernel.org/r/20240325012135.36861-1-o-takashi@sakamocchi.jp
> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
> ---
>  drivers/pci/quirks.c | 8 --------
>  1 file changed, 8 deletions(-)

Reviewed-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>

Thank you for the revert patch, and I apologize for the delay in catching
up with the change. Please feel free to add me or the linux1394-devel list
to CC of these kind of changes.


Thanks

Takashi Sakamoto
diff mbox series

Patch

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index bf4833221816..eff7f5df08e2 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -3765,14 +3765,6 @@  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003e, quirk_no_bus_reset);
  */
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CAVIUM, 0xa100, quirk_no_bus_reset);
 
-/*
- * Apparently the LSI / Agere FW643 can't recover after a Secondary Bus
- * Reset and requires a power-off or suspend/resume and rescan.  Prevent
- * use of that reset.
- */
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATT, 0x5900, quirk_no_bus_reset);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATT, 0x5901, quirk_no_bus_reset);
-
 /*
  * Some TI KeyStone C667X devices do not support bus/hot reset.  The PCIESS
  * automatically disables LTSSM when Secondary Bus Reset is received and