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AJvYcCUfZneGtfwIoTc7XxF0a1EEHilECXMnScShDKEKm3ZEfXst0oMdsr+ilXzcZbRUgOhLb2I8AArXI2lEv25CV/Ny05x8ya57fpSRoEpwvIvgawvm1II6Tc8xxjy2hAkyGxkLLgRCOgKC X-Gm-Message-State: AOJu0YzrWeidQM2yMTRd2tTgcBxYN4XDqVL5G0c1N5ucb4RWA1QiKiF7 vq4Par5mMHKr0mNIWn+7BvYzPD8WkKkV59DT40mREySuj84tPm1A X-Google-Smtp-Source: AGHT+IHfpgCmiN4yKZxh9cbTOz2of+YIvMIYN9KZ2/R2f4ckpehIvdm8HVeXkx9Mi7blW/ux8nM4Ow== X-Received: by 2002:a05:6808:1784:b0:3d2:2512:5a5c with SMTP id 5614622812f47-3d51bb0f078mr8378774b6e.53.1718952311934; Thu, 20 Jun 2024 23:45:11 -0700 (PDT) Received: from localhost.localdomain ([113.30.217.222]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-70651194776sm683117b3a.67.2024.06.20.23.45.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Jun 2024 23:45:11 -0700 (PDT) From: Anand Moon To: Shawn Lin , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas , Heiko Stuebner Cc: Anand Moon , linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/3] PCI: rockchip: Refactor rockchip_pcie_disable_clocks function signature Date: Fri, 21 Jun 2024 12:14:22 +0530 Message-ID: <20240621064426.282048-3-linux.amoon@gmail.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240621064426.282048-1-linux.amoon@gmail.com> References: <20240621064426.282048-1-linux.amoon@gmail.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Updated rockchip_pcie_disable_clocks function to accept a struct rockchip pointer instead of a void pointer. Signed-off-by: Anand Moon --- drivers/pci/controller/pcie-rockchip.c | 4 +--- drivers/pci/controller/pcie-rockchip.h | 2 +- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/pcie-rockchip.c b/drivers/pci/controller/pcie-rockchip.c index f79e2b0a965b..da210cd96d98 100644 --- a/drivers/pci/controller/pcie-rockchip.c +++ b/drivers/pci/controller/pcie-rockchip.c @@ -284,10 +284,8 @@ int rockchip_pcie_enable_clocks(struct rockchip_pcie *rockchip) } EXPORT_SYMBOL_GPL(rockchip_pcie_enable_clocks); -void rockchip_pcie_disable_clocks(void *data) +void rockchip_pcie_disable_clocks(struct rockchip_pcie *rockchip) { - struct rockchip_pcie *rockchip = data; - clk_bulk_disable_unprepare(ROCKCHIP_NUM_CLKS, rockchip->clks); } EXPORT_SYMBOL_GPL(rockchip_pcie_disable_clocks); diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h index 27e951b41b80..3330b1e55dcd 100644 --- a/drivers/pci/controller/pcie-rockchip.h +++ b/drivers/pci/controller/pcie-rockchip.h @@ -354,7 +354,7 @@ int rockchip_pcie_init_port(struct rockchip_pcie *rockchip); int rockchip_pcie_get_phys(struct rockchip_pcie *rockchip); void rockchip_pcie_deinit_phys(struct rockchip_pcie *rockchip); int rockchip_pcie_enable_clocks(struct rockchip_pcie *rockchip); -void rockchip_pcie_disable_clocks(void *data); +void rockchip_pcie_disable_clocks(struct rockchip_pcie *rockchip); void rockchip_pcie_cfg_configuration_accesses( struct rockchip_pcie *rockchip, u32 type);