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Wed, 26 Jun 2024 12:38:01 GMT Received: from hu-krichai-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 26 Jun 2024 05:37:56 -0700 From: Krishna chaitanya chundru Date: Wed, 26 Jun 2024 18:07:49 +0530 Subject: [PATCH RFC 1/7] dt: bindings: add qcom,qps615.yaml Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240626-qps615-v1-1-2ade7bd91e02@quicinc.com> References: <20240626-qps615-v1-0-2ade7bd91e02@quicinc.com> In-Reply-To: <20240626-qps615-v1-0-2ade7bd91e02@quicinc.com> To: Bartosz Golaszewski , Manivannan Sadhasivam , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Jingoo Han CC: , , , , , , , Krishna chaitanya chundru X-Mailer: b4 0.13-dev-83828 X-Developer-Signature: v=1; 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Add a bindings document for the driver. Signed-off-by: Krishna chaitanya chundru --- .../devicetree/bindings/pci/qcom,qps615.yaml | 73 ++++++++++++++++++++++ 1 file changed, 73 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/qcom,qps615.yaml b/Documentation/devicetree/bindings/pci/qcom,qps615.yaml new file mode 100644 index 000000000000..f090683f9e2f --- /dev/null +++ b/Documentation/devicetree/bindings/pci/qcom,qps615.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/qcom,pcie-qps615.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm QPS615 PCIe switch + +maintainers: + - Krishna chaitanya chundru + +description: | + Qualcomm QPS615 PCIe switch has one upstream and three downstream + ports. One of the downstream ports is used as endpoint device of + Ethernet MAC. Other two downstream ports are supposed to connect + to external device. + + The power controlled by the GPIO's, if we enable the GPIO's the + power to the switch will be on. + + The QPS615 PCIe switch is configured through I2C interface before + PCIe link is established. + +properties: + compatible: + enum: + - pci1179,0623 + + reg: + maxItems: 1 + + vdd-supply: + description: | + Phandle to the vdd input voltage which are fixed regulators which + in are mapped to the GPIO's. + + switch-i2c-cntrl: + description: | + phandle to i2c controller which is used to configure the PCIe + switch. + +required: + - compatible + - reg + - vdd-supply + - switch-i2c-cntrl + +additionalProperties: false + +examples: + - | + pcie { + #address-cells = <3>; + #size-cells = <2>; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + bus-range = <0x01 0xff>; + + qps615@0 { + compatible = "pci1179,0623"; + reg = <0x10000 0x0 0x0 0x0 0x0>; + + vdd-supply = <&vdd>; + switch-i2c-cntrl = <&foo>; + }; + }; + };