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Tue, 9 Jul 2024 14:54:04 GMT Received: from tengfan-gv.ap.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 9 Jul 2024 07:53:55 -0700 From: Tengfei Fan Date: Tue, 9 Jul 2024 22:53:43 +0800 Subject: [PATCH v2 1/2] dt-bindings: PCI: qcom-ep: Add support for QCS9100 SoC Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240709-add_qcs9100_pcie_ep_compatible-v2-1-217742eac32b@quicinc.com> References: <20240709-add_qcs9100_pcie_ep_compatible-v2-0-217742eac32b@quicinc.com> In-Reply-To: <20240709-add_qcs9100_pcie_ep_compatible-v2-0-217742eac32b@quicinc.com> To: Manivannan Sadhasivam , "Lorenzo Pieralisi" , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Bjorn Helgaas , Krzysztof Kozlowski , Conor Dooley CC: , , , , , Tengfei Fan X-Mailer: b4 0.15-dev-a66ce X-Developer-Signature: v=1; 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It has DMA register space and dma interrupt to support HDMA. QCS9100 is drived from SA8775p. Currently, both the QCS9100 and SA8775p platform use non-SCMI resource. In the future, the SA8775p platform will move to use SCMI resources and it will have new sa8775p-related device tree. Consequently, introduce "qcom,qcs9100-pcie-ep" to describe non-SCMI based PCIe. Signed-off-by: Tengfei Fan --- Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml index 46802f7d9482..8012663e7efc 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml @@ -13,6 +13,7 @@ properties: compatible: oneOf: - enum: + - qcom,qcs9100-pcie-ep - qcom,sa8775p-pcie-ep - qcom,sdx55-pcie-ep - qcom,sm8450-pcie-ep @@ -203,6 +204,7 @@ allOf: compatible: contains: enum: + - qcom,qcs9100-pcie-ep - qcom,sa8775p-pcie-ep then: properties: