From patchwork Tue Aug 27 06:36:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qiang Yu X-Patchwork-Id: 13778898 X-Patchwork-Delegate: manivannanece23@gmail.com Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1AE9313D53F; Tue, 27 Aug 2024 06:37:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724740624; cv=none; b=kLrIAkS3+HpYdhPnWSKiOODT3k5zq8YvUU/le1n6sbaNL3iEXq3hDTKbs8ynGkXEHpFb35GAfGvU1wEyIcUlG+IFSbJAZUT5xunMHhaUwVP51t0Yg3MhxrK7EnGtel9Plvwjo8K9KaznYEDTj+JVujtVZ5YcSJa64LcGVMIyYMg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724740624; c=relaxed/simple; bh=ZwML+p8sVjfPufvryOW4BtKa/rgIeZBxG5UXbZe3zkY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=asG8rYn5LEpvaq9T3ewpkFjur2146byrp1n+3D/oTTMRwE/l9diN1fWiwIv2w1494Z5VybgZeLORq9hxrA2D9FpbV7TNzale7Zs/9RqxcuzF5ElBatsZASmscNQbMt30J8ANi0q7kqv9Vu6AcC80inpJ5I5WelH4v7XA/ia0UBw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=qualcomm.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=e4aGYZiK; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="e4aGYZiK" Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 47QJGPKs007081; Tue, 27 Aug 2024 06:36:52 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=lo10NXhlnHG kwKF871JZ2ObkWdDWb+Nf4R44B3p2PsM=; b=e4aGYZiKLG6m9MkRtc0hgHF+eMP 6gUIF0cUXCiyfTRMtJvq567u4td6CUIY+2DnRkBi/H5OHU+UySraNX08o3U8d7zG XRX55TCV8UG1lQ90Wh8FL7c6BFCnGz6oa6w/veks3ZGL7iVJvHhbN9VQURgxZttX xavqB0t7+ODhxgIrBu+CzSpdvsnX5IDqqPqGV0wu8HrrOgJuZ0+AmoA1jqDa5glR 2j+ylDvY0QOnSj+TbcolXcSBt8g3UuQbXsfKJtd6wPFxOIkq4krG+nW/8qwYeGK1 w5dzXo35Zdi1hRy1x8L2TxhQ0ji1qPZuJgfzPZe/Tr6WYnxVK2hsh9cpyPw== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 417976wxdx-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 27 Aug 2024 06:36:51 +0000 (GMT) Received: from pps.filterd (NALASPPMTA02.qualcomm.com [127.0.0.1]) by NALASPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTP id 47R6YfXP032163; Tue, 27 Aug 2024 06:36:50 GMT Received: from pps.reinject (localhost [127.0.0.1]) by NALASPPMTA02.qualcomm.com (PPS) with ESMTPS id 4197aaj4nw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 27 Aug 2024 06:36:50 +0000 Received: from NALASPPMTA02.qualcomm.com (NALASPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 47R6O8j8006702; Tue, 27 Aug 2024 06:36:50 GMT Received: from hu-devc-lv-u22-c.qualcomm.com (hu-qianyu-lv.qualcomm.com [10.81.25.114]) by NALASPPMTA02.qualcomm.com (PPS) with ESMTPS id 47R6aoOc004679 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 27 Aug 2024 06:36:50 +0000 Received: by hu-devc-lv-u22-c.qualcomm.com (Postfix, from userid 4098150) id 34B8264E; Mon, 26 Aug 2024 23:36:50 -0700 (PDT) From: Qiang Yu To: manivannan.sadhasivam@linaro.org, vkoul@kernel.org, kishon@kernel.org, robh@kernel.org, andersson@kernel.org, konradybcio@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, abel.vesa@linaro.org, quic_msarkar@quicinc.com, quic_devipriy@quicinc.com Cc: dmitry.baryshkov@linaro.org, kw@linux.com, lpieralisi@kernel.org, neil.armstrong@linaro.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Qiang Yu Subject: [PATCH 5/8] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the X1E80100 QMP PCIe PHY Gen4 x8 Date: Mon, 26 Aug 2024 23:36:28 -0700 Message-Id: <20240827063631.3932971-6-quic_qianyu@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240827063631.3932971-1-quic_qianyu@quicinc.com> References: <20240827063631.3932971-1-quic_qianyu@quicinc.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: iENBN_DSSh1sGc5bvHUKUstSMIzIPcS6 X-Proofpoint-GUID: iENBN_DSSh1sGc5bvHUKUstSMIzIPcS6 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-08-27_04,2024-08-26_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 mlxlogscore=999 malwarescore=0 clxscore=1015 impostorscore=0 adultscore=0 priorityscore=1501 bulkscore=0 mlxscore=0 suspectscore=0 phishscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2408270048 PCIe 3rd instance of X1E80100 support Gen 4x8 which needs different 8 lane capable QMP PCIe PHY. Document Gen 4x8 PHY as separate module. Signed-off-by: Qiang Yu --- .../phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml index 03dbd02cf9e7..e122657490b1 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml @@ -40,6 +40,7 @@ properties: - qcom,sm8650-qmp-gen4x2-pcie-phy - qcom,x1e80100-qmp-gen3x2-pcie-phy - qcom,x1e80100-qmp-gen4x2-pcie-phy + - qcom,x1e80100-qmp-gen4x8-pcie-phy reg: minItems: 1 @@ -47,7 +48,7 @@ properties: clocks: minItems: 5 - maxItems: 7 + maxItems: 8 clock-names: minItems: 5 @@ -59,6 +60,7 @@ properties: - const: pipe - const: pipediv2 - const: phy_aux + - const: clkref_en power-domains: maxItems: 1 @@ -190,6 +192,19 @@ allOf: clock-names: minItems: 7 + - if: + properties: + compatible: + contains: + enum: + - qcom,x1e80100-qmp-gen4x8-pcie-phy + then: + properties: + clocks: + minItems: 8 + clock-names: + minItems: 8 + - if: properties: compatible: @@ -198,6 +213,7 @@ allOf: - qcom,sm8550-qmp-gen4x2-pcie-phy - qcom,sm8650-qmp-gen4x2-pcie-phy - qcom,x1e80100-qmp-gen4x2-pcie-phy + - qcom,x1e80100-qmp-gen4x8-pcie-phy then: properties: resets: