From patchwork Sat Nov 9 09:28:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Bianconi X-Patchwork-Id: 13869336 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D6AC7145A16 for ; Sat, 9 Nov 2024 09:29:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731144565; cv=none; b=ltZmw2iSM1RC99T8Ib0yQxcPRS8eQnbgTNGuVZ1AL3fbepj1/m4yduBwFJB0DkfN5UTy0+RKsYAhgarUr4wWi8IRkz5QRY1myl95B986Owj2dmK3k/ziynfzzZu3nVVtg10yK5k72COKvxqQ8sGulWGnWbTZqdt80ptKtLEMGco= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731144565; c=relaxed/simple; bh=b7sY8eeXTXCv7mml0kvVahhj89cw5WkIPMaWEq+tesY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=VLynqyS6Zo2sGHlR07ld/q6C90VJz+YjnYUogGx67/tIjoFSR/JEmGg9xMdlXj0Agn1ylGlyZF6E4ssq5cc50b9soy5gqR0Atm2RRV1UvaK7RzaeErfflHWV7HATU2ggJ48w+zsLYcll30bQjS9ce+49ZBSkwWsh8kDFsXU1eSM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=dZD88OtH; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="dZD88OtH" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 21087C4CECE; Sat, 9 Nov 2024 09:29:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1731144565; bh=b7sY8eeXTXCv7mml0kvVahhj89cw5WkIPMaWEq+tesY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=dZD88OtH+gYFHPjg33MNygeYJkvaJE0LQW7CM3cno8MbuUB4pO7xWGQozMZ6gjScN x+wmlUSICc0B5d3f2K+fLQa/KfIVRxHwmjm1hnQ/fC7Ny6Vn8kuvo88gfJ/HCDd/gA MMi5IIqmMU7s4YinGdgZEbenrFODb2wn3troLGGGxajZn1MDelAOQAwoGH95KFKAZy KEiRkhJBXdomHLbtm4BFcIpllBqQJ0hiTkcBzB5S4BhU5pSGSGE1f5NQDWyU3tiESo vyGYDAd55C8oPHgcL12aHBCZKoL9ZiEa9z4SdRRmvXfiUUoYQFu9OMtwpIvsfrBTm1 nDRgL24JOAHiQ== From: Lorenzo Bianconi Date: Sat, 09 Nov 2024 10:28:38 +0100 Subject: [PATCH v2 2/4] PCI: mediatek-gen3: rely on clk_bulk_prepare_enable() in mtk_pcie_en7581_power_up() Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241109-pcie-en7581-fixes-v2-2-0ea3a4af994f@kernel.org> References: <20241109-pcie-en7581-fixes-v2-0-0ea3a4af994f@kernel.org> In-Reply-To: <20241109-pcie-en7581-fixes-v2-0-0ea3a4af994f@kernel.org> To: Ryder Lee , Jianjun Wang , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno Cc: linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Lorenzo Bianconi X-Mailer: b4 0.14.2 Squash clk_bulk_prepare() and clk_bulk_enable() in clk_bulk_prepare_enable() in mtk_pcie_en7581_power_up() routine Signed-off-by: Lorenzo Bianconi --- drivers/pci/controller/pcie-mediatek-gen3.c | 14 +++----------- 1 file changed, 3 insertions(+), 11 deletions(-) diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/controller/pcie-mediatek-gen3.c index 0fac0b9fd785e463d26d29d695b923db41eef9cc..8c8c733a145634cdbfefd339f4a692f25a6e24de 100644 --- a/drivers/pci/controller/pcie-mediatek-gen3.c +++ b/drivers/pci/controller/pcie-mediatek-gen3.c @@ -903,12 +903,6 @@ static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie) pm_runtime_enable(dev); pm_runtime_get_sync(dev); - err = clk_bulk_prepare(pcie->num_clks, pcie->clks); - if (err) { - dev_err(dev, "failed to prepare clock\n"); - goto err_clk_prepare; - } - val = FIELD_PREP(PCIE_VAL_LN0_DOWNSTREAM, 0x47) | FIELD_PREP(PCIE_VAL_LN1_DOWNSTREAM, 0x47) | FIELD_PREP(PCIE_VAL_LN0_UPSTREAM, 0x41) | @@ -921,17 +915,15 @@ static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie) FIELD_PREP(PCIE_K_FINETUNE_MAX, 0xf); writel_relaxed(val, pcie->base + PCIE_PIPE4_PIE8_REG); - err = clk_bulk_enable(pcie->num_clks, pcie->clks); + err = clk_bulk_prepare_enable(pcie->num_clks, pcie->clks); if (err) { dev_err(dev, "failed to prepare clock\n"); - goto err_clk_enable; + goto err_clk_init; } return 0; -err_clk_enable: - clk_bulk_unprepare(pcie->num_clks, pcie->clks); -err_clk_prepare: +err_clk_init: pm_runtime_put_sync(dev); pm_runtime_disable(dev); reset_control_assert(pcie->mac_reset);