From patchwork Sat Nov 9 09:28:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Bianconi X-Patchwork-Id: 13869337 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6C646146D57 for ; Sat, 9 Nov 2024 09:29:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731144568; cv=none; b=CqmEGRJcgCL7kOI9tDIZ7xy03bbO8UFWockdOpYJhl/q7vwWeObxhHymUtw9nCAdP48n3nzP2LWfSr12cV2nLtyDbB5/cmA1x3GCzsWnQs6PUSq6qw/RHXn2GaK48e+WxE0nmzU+tpW0Juklps5J1v75K6zpu6Tq7oy0uYGqn/k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731144568; c=relaxed/simple; bh=L+Tb8zBkZwxLcT8ZO2OWnc/bfPC5zN+Fbgmb8QaRcIE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=tSLlKVnyccXxitBK9HrYI6QeHNbggFAEBgLAuUNDe+aB3Ww4QVxX4/uNa+yDG440vVOinJnZeiwatPglSVu6pxG9+bqz6wnvvHTMdkyIKYOt/+qcbYGrXnMFjk1Sa59x6hjBxWc78QA7lkX/u3cHLBn6slAWqu9UB50gsGjvDvM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=gtKbOjIp; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="gtKbOjIp" Received: by smtp.kernel.org (Postfix) with ESMTPSA id B7A64C4CECE; Sat, 9 Nov 2024 09:29:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1731144568; bh=L+Tb8zBkZwxLcT8ZO2OWnc/bfPC5zN+Fbgmb8QaRcIE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=gtKbOjIppaEaAgSR4fuMak7Xra9a9/IBd6y7Qja22dc44jViJEdaAufIo3ul4Uqiu shETEdwZOjYiFNr7sS+NSKkP6H/lqUXB4uX289b6g9T0Vyl9lpNq0XDVeJ7TQ9J1gW vVdRbExcJRi/nFEYtrWetPEtrwNc9tUgPkpH6P66wdcYsrnoLaDVpu55WOc4+7Ptw5 A2StZs69Ydsqu+v3xlexPuA3TfXQCvHtyo6Pg2jBi6LeNy+mBaAG979n5eq95QdHDw FlTEpNvB9WnkFjMUCCsPFY9V8odI4uwS7K1qs8RekriNAPJazxeQ2gqfPdJVsQE/n0 HxPfypb2s8aOg== From: Lorenzo Bianconi Date: Sat, 09 Nov 2024 10:28:39 +0100 Subject: [PATCH v2 3/4] PCI: mediatek-gen3: Move reset/assert callbacks in .power_up() Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241109-pcie-en7581-fixes-v2-3-0ea3a4af994f@kernel.org> References: <20241109-pcie-en7581-fixes-v2-0-0ea3a4af994f@kernel.org> In-Reply-To: <20241109-pcie-en7581-fixes-v2-0-0ea3a4af994f@kernel.org> To: Ryder Lee , Jianjun Wang , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno Cc: linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Lorenzo Bianconi X-Mailer: b4 0.14.2 In order to make the code more readable, move phy and mac reset lines assert/de-assert configuration in .power_up() callback (mtk_pcie_en7581_power_up()/mtk_pcie_power_up()). Introduce PCIE_MTK_RESET_TIME_US macro for the time needed to complete PCIe reset on MediaTek controller. Signed-off-by: Lorenzo Bianconi --- drivers/pci/controller/pcie-mediatek-gen3.c | 28 ++++++++++++++++++++-------- 1 file changed, 20 insertions(+), 8 deletions(-) diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/controller/pcie-mediatek-gen3.c index 8c8c733a145634cdbfefd339f4a692f25a6e24de..1ad93d2407810ba873d9a16da96208b3cc0c3011 100644 --- a/drivers/pci/controller/pcie-mediatek-gen3.c +++ b/drivers/pci/controller/pcie-mediatek-gen3.c @@ -120,6 +120,9 @@ #define MAX_NUM_PHY_RESETS 3 +/* Time in us needed to complete PCIe reset on MediaTek controller */ +#define PCIE_MTK_RESET_TIME_US 10 + /* Time in ms needed to complete PCIe reset on EN7581 SoC */ #define PCIE_EN7581_RESET_TIME_MS 100 @@ -867,6 +870,14 @@ static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie) int err; u32 val; + /* + * The controller may have been left out of reset by the bootloader + * so make sure that we get a clean start by asserting resets here. + */ + reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, + pcie->phy_resets); + reset_control_assert(pcie->mac_reset); + /* * Wait for the time needed to complete the bulk assert in * mtk_pcie_setup for EN7581 SoC. @@ -941,6 +952,15 @@ static int mtk_pcie_power_up(struct mtk_gen3_pcie *pcie) struct device *dev = pcie->dev; int err; + /* + * The controller may have been left out of reset by the bootloader + * so make sure that we get a clean start by asserting resets here. + */ + reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, + pcie->phy_resets); + reset_control_assert(pcie->mac_reset); + usleep_range(PCIE_MTK_RESET_TIME_US, 2 * PCIE_MTK_RESET_TIME_US); + /* PHY power on and enable pipe clock */ err = reset_control_bulk_deassert(pcie->soc->phy_resets.num_resets, pcie->phy_resets); if (err) { @@ -1013,14 +1033,6 @@ static int mtk_pcie_setup(struct mtk_gen3_pcie *pcie) * counter since the bulk is shared. */ reset_control_bulk_deassert(pcie->soc->phy_resets.num_resets, pcie->phy_resets); - /* - * The controller may have been left out of reset by the bootloader - * so make sure that we get a clean start by asserting resets here. - */ - reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, pcie->phy_resets); - - reset_control_assert(pcie->mac_reset); - usleep_range(10, 20); /* Don't touch the hardware registers before power up */ err = pcie->soc->power_up(pcie);