Message ID | 20241206161210.163701-3-yazen.ghannam@amd.com (mailing list archive) |
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State | New |
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client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by DS1PEPF0001708E.mail.protection.outlook.com (10.167.17.134) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8230.7 via Frontend Transport; Fri, 6 Dec 2024 16:12:26 +0000 Received: from purico-9eb2host.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 6 Dec 2024 10:12:25 -0600 From: Yazen Ghannam <yazen.ghannam@amd.com> To: <yazen.ghannam@amd.com>, <x86@kernel.org>, Tony Luck <tony.luck@intel.com>, Mario Limonciello <mario.limonciello@amd.com>, "Bjorn Helgaas" <bhelgaas@google.com>, Jean Delvare <jdelvare@suse.com>, "Guenter Roeck" <linux@roeck-us.net>, Clemens Ladisch <clemens@ladisch.de>, "Shyam Sundar S K" <Shyam-sundar.S-k@amd.com>, Hans de Goede <hdegoede@redhat.com>, =?utf-8?q?Ilpo_J=C3=A4rvinen?= <ilpo.jarvinen@linux.intel.com>, "Naveen Krishna Chatradhi" <naveenkrishna.chatradhi@amd.com>, Suma Hegde <suma.hegde@amd.com> CC: <linux-kernel@vger.kernel.org>, <linux-edac@vger.kernel.org>, <linux-pci@vger.kernel.org>, <linux-hwmon@vger.kernel.org>, <platform-driver-x86@vger.kernel.org> Subject: [PATCH v2 02/16] x86/amd_nb: Restrict init function to AMD-based systems Date: Fri, 6 Dec 2024 16:11:55 +0000 Message-ID: <20241206161210.163701-3-yazen.ghannam@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241206161210.163701-1-yazen.ghannam@amd.com> References: <20241206161210.163701-1-yazen.ghannam@amd.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: <linux-pci.vger.kernel.org> List-Subscribe: <mailto:linux-pci+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-pci+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF0001708E:EE_|CY5PR12MB6323:EE_ X-MS-Office365-Filtering-Correlation-Id: 0d1e842a-8d28-49ee-57eb-08dd1610c6cd X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|1800799024|82310400026|36860700013|921020; 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AMD NB and SMN rework
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diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c index 9fe9972d2071..37b8244899d8 100644 --- a/arch/x86/kernel/amd_nb.c +++ b/arch/x86/kernel/amd_nb.c @@ -582,6 +582,10 @@ static __init void fix_erratum_688(void) static __init int init_amd_nbs(void) { + if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD && + boot_cpu_data.x86_vendor != X86_VENDOR_HYGON) + return 0; + amd_cache_northbridges(); amd_cache_gart();
The code implicitly operates on AMD-based systems by matching on PCI IDs. However, the use of these IDs is going away. Add an explicit CPU vendor check instead of relying on PCI IDs. Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> --- Notes: Link: https://lore.kernel.org/20241023172150.659002-3-yazen.ghannam@amd.com v1->v2: * No change. arch/x86/kernel/amd_nb.c | 4 ++++ 1 file changed, 4 insertions(+)