@@ -697,10 +697,31 @@ void __iomem *dw_pcie_own_conf_map_bus(struct pci_bus *bus, unsigned int devfn,
}
EXPORT_SYMBOL_GPL(dw_pcie_own_conf_map_bus);
+static int dw_pcie_pre_scale_bus_bw(struct pci_bus *bus, int target_speed)
+{
+ struct dw_pcie_rp *pp = bus->sysdata;
+ int ret = 0;
+
+ if (pp->ops->pre_scale_bus_bw)
+ ret = pp->ops->pre_scale_bus_bw(pp, target_speed);
+
+ return ret;
+}
+
+static void dw_pcie_post_scale_bus_bw(struct pci_bus *bus, int current_speed)
+{
+ struct dw_pcie_rp *pp = bus->sysdata;
+
+ if (pp->ops->pre_scale_bus_bw)
+ pp->ops->post_scale_bus_bw(pp, current_speed);
+}
+
static struct pci_ops dw_pcie_ops = {
.map_bus = dw_pcie_own_conf_map_bus,
.read = pci_generic_config_read,
.write = pci_generic_config_write,
+ .pre_scale_bus_bw = dw_pcie_pre_scale_bus_bw,
+ .post_scale_bus_bw = dw_pcie_post_scale_bus_bw,
};
static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp)
@@ -354,6 +354,8 @@ struct dw_pcie_host_ops {
void (*post_init)(struct dw_pcie_rp *pp);
int (*msi_init)(struct dw_pcie_rp *pp);
void (*pme_turn_off)(struct dw_pcie_rp *pp);
+ int (*pre_scale_bus_bw)(struct dw_pcie_rp *pp, int target_speed);
+ void (*post_scale_bus_bw)(struct dw_pcie_rp *pp, int current_speed);
};
struct dw_pcie_rp {
Add support for pre_scale_bus_bw() & post_scale_bus_bw() function op's. Add support for DWC glue drivers to register for these ops. Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> --- drivers/pci/controller/dwc/pcie-designware-host.c | 21 +++++++++++++++++++++ drivers/pci/controller/dwc/pcie-designware.h | 2 ++ 2 files changed, 23 insertions(+)