From patchwork Wed Feb 26 12:18:36 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: LeoLiu-oc X-Patchwork-Id: 13993362 X-Patchwork-Delegate: bhelgaas@google.com Received: from mx2.zhaoxin.com (mx2.zhaoxin.com [61.152.208.219]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A245B270058 for ; Thu, 27 Feb 2025 00:37:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=61.152.208.219 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740616675; cv=none; b=fnQZ7Ng+1F6zTeZaExGYbEo7mIh35CYLJwvM88TWwhU097tJvLMji5NVVsX6YaBXFkEUeCemEjArbNaFjC5watDAVDkGBs2yarSKbtKNoUhQxM5ggFyOADFqC+Car/t90D4wBVtA4KlVP3LS+o2GmXw29znm1j6C0Aben8jyhqM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740616675; c=relaxed/simple; bh=xf6aa909pkiri3/XbRp02yuy6janMrg6fh9L8J/CqZg=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=eiKnlLExqmJAuDGVsvJhNBFoalqwLED+vKkhQf/+00wlCEJzsJcgK0bFG8MwpROJoY/OHBuNGUiPa2+USqp/2EToYr22Iz44YL/rsuN+d2ldEsVvdoWY4ALYnMYtIA6ruBrYGFKtutvBQG5dkxfX0Eq4lcTIB0+1DuEFY78AHOg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=zhaoxin.com; spf=pass smtp.mailfrom=zhaoxin.com; arc=none smtp.client-ip=61.152.208.219 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=zhaoxin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=zhaoxin.com X-ASG-Debug-ID: 1740616661-1eb14e79ff31220001-0c9NHn Received: from ZXSHMBX1.zhaoxin.com (ZXSHMBX1.zhaoxin.com [10.28.252.163]) by mx2.zhaoxin.com with ESMTP id eI7UeMFzGx2DDqYp (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NO); Thu, 27 Feb 2025 08:37:41 +0800 (CST) X-Barracuda-Envelope-From: LeoLiu-oc@zhaoxin.com X-Barracuda-RBL-Trusted-Forwarder: 10.28.252.163 Received: from ZXSHMBX2.zhaoxin.com (10.28.252.164) by ZXSHMBX1.zhaoxin.com (10.28.252.163) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.44; Thu, 27 Feb 2025 08:37:41 +0800 Received: from ZXSHMBX2.zhaoxin.com ([fe80::4dfc:4f6a:c0cf:4298]) by ZXSHMBX2.zhaoxin.com ([fe80::4dfc:4f6a:c0cf:4298%4]) with mapi id 15.01.2507.044; Thu, 27 Feb 2025 08:37:41 +0800 X-Barracuda-RBL-Trusted-Forwarder: 10.28.252.163 Received: from xin.lan (10.32.64.1) by ZXBJMBX03.zhaoxin.com (10.29.252.7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.44; Wed, 26 Feb 2025 20:18:54 +0800 From: LeoLiu-oc To: , , , , , , , , , , , , CC: , , , , LeoLiuoc Subject: [PATCH v5 2/4] ACPI: APEI: Add new hest_parse_pcie_aer() Date: Wed, 26 Feb 2025 20:18:36 +0800 X-ASG-Orig-Subj: [PATCH v5 2/4] ACPI: APEI: Add new hest_parse_pcie_aer() Message-ID: <20250226121838.364533-3-LeoLiu-oc@zhaoxin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250226121838.364533-1-LeoLiu-oc@zhaoxin.com> References: <20250226121838.364533-1-LeoLiu-oc@zhaoxin.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: zxbjmbx1.zhaoxin.com (10.29.252.163) To ZXBJMBX03.zhaoxin.com (10.29.252.7) X-Moderation-Data: 2/27/2025 8:37:40 AM X-Barracuda-Connect: ZXSHMBX1.zhaoxin.com[10.28.252.163] X-Barracuda-Start-Time: 1740616661 X-Barracuda-Encrypted: ECDHE-RSA-AES128-GCM-SHA256 X-Barracuda-URL: https://10.28.252.36:4443/cgi-mod/mark.cgi X-Virus-Scanned: by bsmtpd at zhaoxin.com X-Barracuda-Scan-Msg-Size: 3598 X-Barracuda-BRTS-Status: 1 X-Barracuda-Bayes: INNOCENT GLOBAL 0.0000 1.0000 -2.0210 X-Barracuda-Spam-Score: -2.02 X-Barracuda-Spam-Status: No, SCORE=-2.02 using global scores of TAG_LEVEL=1000.0 QUARANTINE_LEVEL=1000.0 KILL_LEVEL=9.0 tests= X-Barracuda-Spam-Report: Code version 3.2, rules version 3.2.3.137756 Rule breakdown below pts rule name description ---- ---------------------- -------------------------------------------------- From: LeoLiuoc The purpose of the function apei_hest_parse_aer() is used to parse and extract register value from HEST PCIe AER structures. This applies to all hardware platforms that has a PCI Express AER structure in HEST. Signed-off-by: LeoLiuoc --- drivers/acpi/apei/hest.c | 52 +++++++++++++++++++++++++++++++++++++++- include/acpi/apei.h | 11 +++++++++ 2 files changed, 62 insertions(+), 1 deletion(-) diff --git a/drivers/acpi/apei/hest.c b/drivers/acpi/apei/hest.c index 35d08f4e50e6..e7a15d60ecc1 100644 --- a/drivers/acpi/apei/hest.c +++ b/drivers/acpi/apei/hest.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -132,7 +133,56 @@ static bool is_ghes_assist_struct(struct acpi_hest_header *hest_hdr) return false; } -typedef int (*apei_hest_func_t)(struct acpi_hest_header *hest_hdr, void *data); +static bool hest_match_pci_devfn(struct acpi_hest_aer_common *p, struct pci_dev *dev) +{ + return ACPI_HEST_SEGMENT(p->bus) == pci_domain_nr(dev->bus) && + ACPI_HEST_BUS(p->bus) == dev->bus->number && + p->device == PCI_SLOT(dev->devfn) && + p->function == PCI_FUNC(dev->devfn); +} + +static bool hest_source_is_pcie_aer(struct acpi_hest_header *hest_hdr, struct pci_dev *dev) +{ + u16 hest_type = hest_hdr->type; + u8 pcie_type = pci_pcie_type(dev); + struct acpi_hest_aer_common *common = (struct acpi_hest_aer_common *)(hest_hdr + 1); + + switch (hest_type) { + case ACPI_HEST_TYPE_AER_ROOT_PORT: + if (pcie_type != PCI_EXP_TYPE_ROOT_PORT) + return false; + break; + case ACPI_HEST_TYPE_AER_ENDPOINT: + if (pcie_type != PCI_EXP_TYPE_ENDPOINT) + return false; + break; + case ACPI_HEST_TYPE_AER_BRIDGE: + if (pcie_type != PCI_EXP_TYPE_PCI_BRIDGE && pcie_type != PCI_EXP_TYPE_PCIE_BRIDGE) + return false; + break; + default: + return false; + } + + if (common->flags & ACPI_HEST_GLOBAL) + return true; + + if (hest_match_pci_devfn(common, dev)) + return true; + + return false; +} + +int hest_parse_pcie_aer(struct acpi_hest_header *hest_hdr, void *data) +{ + struct hest_parse_aer_info *info = data; + + info->data = (void *)hest_hdr; + if (!hest_source_is_pcie_aer(hest_hdr, info->pci_dev)) + return 0; + else + return 1; +} int apei_hest_parse(apei_hest_func_t func, void *data) { diff --git a/include/acpi/apei.h b/include/acpi/apei.h index b79976daa4bb..047e0469927c 100644 --- a/include/acpi/apei.h +++ b/include/acpi/apei.h @@ -23,6 +23,11 @@ enum hest_status { HEST_NOT_FOUND, }; +struct hest_parse_aer_info { + struct pci_dev *pci_dev; + void *data; +}; + extern int hest_disable; extern int erst_disable; #ifdef CONFIG_ACPI_APEI_GHES @@ -33,12 +38,18 @@ void __init acpi_ghes_init(void); static inline void acpi_ghes_init(void) { } #endif +typedef int (*apei_hest_func_t)(struct acpi_hest_header *hest_hdr, void *data); int apei_hest_parse(apei_hest_func_t func, void *data); #ifdef CONFIG_ACPI_APEI void __init acpi_hest_init(void); +int hest_parse_pcie_aer(struct acpi_hest_header *hest_hdr, void *data); #else static inline void acpi_hest_init(void) { } +static inline int hest_parse_pcie_aer(struct acpi_hest_header *hest_hdr, void *data) +{ + return 0; +} #endif int erst_write(const struct cper_record_header *record);