From patchwork Thu Feb 27 13:40:44 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam via B4 Relay X-Patchwork-Id: 13994492 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8CB0522FDE6; Thu, 27 Feb 2025 13:40:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740663654; cv=none; b=pZqntTW2BcRGEEohcu5pxIcj0I3ZpT3xx+j1dF8Lr/H9o2TVqKIqYPYul/wk7zQSXfJe0p59poWkCNcfirxhF6/YQWt0Lk782KiVYA6yQzrBtTHfO+PMMwOjYU3ailV7rSrGEt8C4/gaBbfEby+JrsqDLsUo98RaSYXikKfGi1c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740663654; c=relaxed/simple; bh=lAHj8IPb/6vf1/52k0UtNJ201uuTWiMlEH0tvGzn+ZM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=bqEuGlJveuQmjiGu4llbGY284U733WfkbeKYjjsfnnT5MxVQjHDYnwIZoOOPSiU4xN0FOxQAFrzqOT8dr+F3mfq3UKwMF0jmpx4qehgWzGymucpUyeo4ht0JLR7G8nVZT6SbLUMsDdTtkxe82ogJ3EgqM2gsJc9CCFj4btTBqUc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=TM0lALL1; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="TM0lALL1" Received: by smtp.kernel.org (Postfix) with ESMTPS id 19DEFC4CEE8; Thu, 27 Feb 2025 13:40:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1740663654; bh=lAHj8IPb/6vf1/52k0UtNJ201uuTWiMlEH0tvGzn+ZM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=TM0lALL1Y1Zi3VBZBOVrkQ2xFPW/usud9IXflMElGgrt+g7pKAKv46UJDx8pwhJWI aRYMHT88T8CmnBvhSe6EUZqnMwQBSEc9i6UaYFqzw8dfrw77U2yk2JcRN2zclKD1Le L7UzapD0Hen5GP/UGetY7MhSlCIX7UUkTxZhEb7Qgr6uKfuD/QIHMK4XivxbsTIL6D hzZdJbD+WTAW1lYiDBR3UwJy2ZQ94Qcrf1zQ6pyRT3BbB6Pr/hpfpMzuwdisWvszgA KjvtkyRWMXlLbACp9ZvGXMRUlSOFGGkpKxW+jJxnbMjuRGj5k4UI7QtSJK0mNNqq+I zlHlYrKHWd7sQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0BFE9C1B0D9; Thu, 27 Feb 2025 13:40:54 +0000 (UTC) From: Manivannan Sadhasivam via B4 Relay Date: Thu, 27 Feb 2025 19:10:44 +0530 Subject: [PATCH 02/23] arm64: dts: qcom: sm8150: Add 'global' PCIe interrupt Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250227-pcie-global-irq-v1-2-2b70a7819d1e@linaro.org> References: <20250227-pcie-global-irq-v1-0-2b70a7819d1e@linaro.org> In-Reply-To: <20250227-pcie-global-irq-v1-0-2b70a7819d1e@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Bjorn Helgaas , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , cros-qcom-dts-watchers@chromium.org Cc: linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Manivannan Sadhasivam X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1863; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=7uBSWDIfhUklxBW1/XSMAhommU1p8JsVSjILqCd/ExU=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBnwGtdTKh3IumSGsH/ZQBSf8ArkqVzaa8sxmgMA tkxvF+UjR2JATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZ8BrXQAKCRBVnxHm/pHO 9bf6B/40nLuZPC7rv5pnblGdPLwglgDs7NYup2NcBgVxhUfexaE6uCuDjITjsqoXCjC50C3c/4e OK9Iy5Z85TsWdG7oFuccS4KMCKCotrXzT9xqkpqHFopQY+gSMsr5WFFJCuVxgw9jPGHfI++Jp3I 7uRtFz1A5ANR4sqIe11uGoyKgI/D/7UdDyylIjhdtzC/UdzsjPJPgmvVAJqBYA6e36VpxseNKkc o/wIc6CmR4qXFCGBhgOsdCtD5w2Nsr2ogXlso/YQYFOmuNuTGCZMNZsTV4dvLPB99DIhT+CZ/65 fDDa/8T66eW0fKyMKx0b2GnpxBM36DyF6I/CY18VyBanXtcc X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 X-Endpoint-Received: by B4 Relay for manivannan.sadhasivam@linaro.org/default with auth_id=185 X-Original-From: Manivannan Sadhasivam Reply-To: manivannan.sadhasivam@linaro.org From: Manivannan Sadhasivam 'global' interrupt is used to receive PCIe controller and link specific events. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 4dbda54b47a5..12f1d40b1db8 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -1852,7 +1852,8 @@ pcie0: pcie@1c00000 { , , , - ; + , + ; interrupt-names = "msi0", "msi1", "msi2", @@ -1860,7 +1861,8 @@ pcie0: pcie@1c00000 { "msi4", "msi5", "msi6", - "msi7"; + "msi7", + "global"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ @@ -1969,7 +1971,8 @@ pcie1: pcie@1c08000 { , , , - ; + , + ; interrupt-names = "msi0", "msi1", "msi2", @@ -1977,7 +1980,8 @@ pcie1: pcie@1c08000 { "msi4", "msi5", "msi6", - "msi7"; + "msi7", + "global"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &intc 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */