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Sun, 16 Mar 2025 18:14:06 -0700 (PDT) From: Zhangfei Gao To: Bjorn Helgaas , Baolu Lu , Robin Murphy , Joerg Roedel , Jason Gunthorpe , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= Cc: iommu@lists.linux.dev, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Zhangfei Gao Subject: [PATCH v3] PCI: Declare quirk_huawei_pcie_sva() as pci_fixup_header Date: Mon, 17 Mar 2025 01:13:52 +0000 Message-Id: <20250317011352.5806-1-zhangfei.gao@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250315101032.5152-1-zhangfei.gao@linaro.org> References: <20250315101032.5152-1-zhangfei.gao@linaro.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The commit bcb81ac6ae3c ("iommu: Get DT/ACPI parsing into the proper probe path") fixed the iommu_probe_device() flow to correctly initialize firmware operations, allowing arm_smmu_probe_device() to be invoked earlier. This changes the invocation timing of arm_smmu_probe_device from the final fixup phase to the header fixup phase. pci_iov_add_virtfn pci_device_add pci_fixup_device(pci_fixup_header) <-- device_add bus_notify iommu_bus_notifier + iommu_probe_device + arm_smmu_probe_device pci_bus_add_device pci_fixup_device(pci_fixup_final) <-- device_attach driver_probe_device really_probe pci_dma_configure acpi_dma_configure_id - iommu_probe_device - arm_smmu_probe_device This is the pci_iov_add_virtfn(). The non-SR-IOV case is similar in that pci_device_add() is called from pci_scan_single_device() in the generic enumeration path, and pci_bus_add_device() is called later, after all a host bridge has been enumerated. Declare the fixup as pci_fixup_header to ensure the configuration happens before arm_smmu_probe_device. Fixes: bcb81ac6ae3c ("iommu: Get DT/ACPI parsing into the proper probe path") Signed-off-by: Zhangfei Gao Acked-by: Bjorn Helgaas --- v3: modify commit msg, add Acked-by v2: modify commit msg drivers/pci/quirks.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index f840d611c450..a9759889ff5e 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -1991,12 +1991,12 @@ static void quirk_huawei_pcie_sva(struct pci_dev *pdev) device_create_managed_software_node(&pdev->dev, properties, NULL)) pci_warn(pdev, "could not add stall property"); } -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa250, quirk_huawei_pcie_sva); -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa251, quirk_huawei_pcie_sva); -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa255, quirk_huawei_pcie_sva); -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa256, quirk_huawei_pcie_sva); -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa258, quirk_huawei_pcie_sva); -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa259, quirk_huawei_pcie_sva); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HUAWEI, 0xa250, quirk_huawei_pcie_sva); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HUAWEI, 0xa251, quirk_huawei_pcie_sva); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HUAWEI, 0xa255, quirk_huawei_pcie_sva); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HUAWEI, 0xa256, quirk_huawei_pcie_sva); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HUAWEI, 0xa258, quirk_huawei_pcie_sva); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HUAWEI, 0xa259, quirk_huawei_pcie_sva); /* * It's possible for the MSI to get corrupted if SHPC and ACPI are used