Message ID | 20250402141122.2818478-7-michal.winiarski@intel.com (mailing list archive) |
---|---|
State | New |
Headers | show
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Wed, 2 Apr 2025 14:12:05 +0000 From: =?utf-8?q?Micha=C5=82_Winiarski?= <michal.winiarski@intel.com> To: <linux-pci@vger.kernel.org>, <intel-xe@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org>, <linux-kernel@vger.kernel.org>, "Bjorn Helgaas" <bhelgaas@google.com>, =?utf-8?q?Christian_K=C3=B6nig?= <christian.koenig@amd.com>, =?utf-8?q?Krzy?= =?utf-8?q?sztof_Wilczy=C5=84ski?= <kw@linux.com>, =?utf-8?q?Ilpo_J=C3=A4rvi?= =?utf-8?q?nen?= <ilpo.jarvinen@linux.intel.com> CC: Rodrigo Vivi <rodrigo.vivi@intel.com>, Michal Wajdeczko <michal.wajdeczko@intel.com>, Lucas De Marchi <lucas.demarchi@intel.com>, =?utf-8?q?Thomas_Hellstr=C3=B6m?= <thomas.hellstrom@linux.intel.com>, Maarten Lankhorst <maarten.lankhorst@linux.intel.com>, Maxime Ripard <mripard@kernel.org>, Thomas Zimmermann <tzimmermann@suse.de>, David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>, Matt Roper <matthew.d.roper@intel.com>, =?utf-8?q?Micha=C5=82_Winiarski?= <michal.winiarski@intel.com> Subject: [PATCH v7 6/6] drm/xe/pf: Set VF LMEM BAR size Date: Wed, 2 Apr 2025 16:11:22 +0200 Message-ID: <20250402141122.2818478-7-michal.winiarski@intel.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250402141122.2818478-1-michal.winiarski@intel.com> References: <20250402141122.2818478-1-michal.winiarski@intel.com> Content-Type: text/plain; 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Series |
PCI: VF resizable BAR
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expand
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diff --git a/drivers/gpu/drm/xe/regs/xe_bars.h b/drivers/gpu/drm/xe/regs/xe_bars.h index ce05b6ae832f1..880140d6ccdca 100644 --- a/drivers/gpu/drm/xe/regs/xe_bars.h +++ b/drivers/gpu/drm/xe/regs/xe_bars.h @@ -7,5 +7,6 @@ #define GTTMMADR_BAR 0 /* MMIO + GTT */ #define LMEM_BAR 2 /* VRAM */ +#define VF_LMEM_BAR 9 /* VF VRAM */ #endif diff --git a/drivers/gpu/drm/xe/xe_pci_sriov.c b/drivers/gpu/drm/xe/xe_pci_sriov.c index 09ee8a06fe2ed..4be566331ee15 100644 --- a/drivers/gpu/drm/xe/xe_pci_sriov.c +++ b/drivers/gpu/drm/xe/xe_pci_sriov.c @@ -3,6 +3,10 @@ * Copyright © 2023-2024 Intel Corporation */ +#include <linux/bitops.h> +#include <linux/pci.h> + +#include "regs/xe_bars.h" #include "xe_assert.h" #include "xe_device.h" #include "xe_gt_sriov_pf_config.h" @@ -111,6 +115,18 @@ static void pf_link_vfs(struct xe_device *xe, int num_vfs) } } +static int resize_vf_vram_bar(struct xe_device *xe, int num_vfs) +{ + struct pci_dev *pdev = to_pci_dev(xe->drm.dev); + u32 sizes; + + sizes = pci_iov_vf_bar_get_sizes(pdev, VF_LMEM_BAR, num_vfs); + if (!sizes) + return 0; + + return pci_iov_vf_bar_set_size(pdev, VF_LMEM_BAR, __fls(sizes)); +} + static int pf_enable_vfs(struct xe_device *xe, int num_vfs) { struct pci_dev *pdev = to_pci_dev(xe->drm.dev); @@ -137,6 +153,12 @@ static int pf_enable_vfs(struct xe_device *xe, int num_vfs) if (err < 0) goto failed; + if (IS_DGFX(xe)) { + err = resize_vf_vram_bar(xe, num_vfs); + if (err) + xe_sriov_info(xe, "Failed to set VF LMEM BAR size: %d\n", err); + } + err = pci_enable_sriov(pdev, num_vfs); if (err < 0) goto failed;