From patchwork Fri Jul 17 17:23:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuppuswamy Sathyanarayanan X-Patchwork-Id: 11670887 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 66C7F1392 for ; Fri, 17 Jul 2020 17:24:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4D35D2074B for ; Fri, 17 Jul 2020 17:24:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726104AbgGQRYP (ORCPT ); Fri, 17 Jul 2020 13:24:15 -0400 Received: from mga07.intel.com ([134.134.136.100]:31672 "EHLO mga07.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726359AbgGQRX6 (ORCPT ); Fri, 17 Jul 2020 13:23:58 -0400 IronPort-SDR: GM9YVYulqGMub1YrIar5cGL9WQX2WsYmeD76xSGjti0ahokVYKd4IADXiS6a4jvQI2Pc6yl+cc ItL+xkzntDsg== X-IronPort-AV: E=McAfee;i="6000,8403,9685"; a="214353103" X-IronPort-AV: E=Sophos;i="5.75,364,1589266800"; d="scan'208";a="214353103" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Jul 2020 10:23:58 -0700 IronPort-SDR: oRflC2+CQhvDN04Doxlt2CZ/wgLybqzk4toSuhH3dTRAO8C4Vlc+RElark+rPomHaYfFywIIvI zomZjPgwV/6w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,364,1589266800"; d="scan'208";a="282846751" Received: from jmharral-mobl.amr.corp.intel.com (HELO localhost.localdomain) ([10.254.77.39]) by orsmga003.jf.intel.com with ESMTP; 17 Jul 2020 10:23:57 -0700 From: sathyanarayanan.kuppuswamy@linux.intel.com To: bhelgaas@google.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, ashok.raj@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com Subject: [PATCH v7 1/5] PCI: Conditionally initialize host bridge native_* members Date: Fri, 17 Jul 2020 10:23:46 -0700 Message-Id: <30d6bfee24fd71357365965fac869401b2e962f0.1595006564.git.sathyanarayanan.kuppuswamy@linux.intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Kuppuswamy Sathyanarayanan If CONFIG_PCIEPORTBUS is not enabled in kernel then initialing struct pci_host_bridge PCIe specific native_* members to "1" is incorrect. So protect the PCIe specific member initialization with CONFIG_PCIEPORTBUS. Signed-off-by: Kuppuswamy Sathyanarayanan --- drivers/pci/probe.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 2f66988cea25..a94b97564ceb 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -588,12 +588,14 @@ static void pci_init_host_bridge(struct pci_host_bridge *bridge) * may implement its own AER handling and use _OSC to prevent the * OS from interfering. */ +#ifdef CONFIG_PCIEPORTBUS bridge->native_aer = 1; bridge->native_pcie_hotplug = 1; - bridge->native_shpc_hotplug = 1; bridge->native_pme = 1; bridge->native_ltr = 1; bridge->native_dpc = 1; +#endif + bridge->native_shpc_hotplug = 1; device_initialize(&bridge->dev); }