From patchwork Mon Apr 20 01:54:52 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hidetoshi Seto X-Patchwork-Id: 18959 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n3K1tKmC000729 for ; Mon, 20 Apr 2009 01:55:20 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753050AbZDTBzT (ORCPT ); Sun, 19 Apr 2009 21:55:19 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1752603AbZDTBzT (ORCPT ); Sun, 19 Apr 2009 21:55:19 -0400 Received: from fgwmail7.fujitsu.co.jp ([192.51.44.37]:60088 "EHLO fgwmail7.fujitsu.co.jp" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750814AbZDTBzR (ORCPT ); Sun, 19 Apr 2009 21:55:17 -0400 Received: from m2.gw.fujitsu.co.jp ([10.0.50.72]) by fgwmail7.fujitsu.co.jp (Fujitsu Gateway) with ESMTP id n3K1tFNT006712 (envelope-from seto.hidetoshi@jp.fujitsu.com); Mon, 20 Apr 2009 10:55:16 +0900 Received: from smail (m2 [127.0.0.1]) by outgoing.m2.gw.fujitsu.co.jp (Postfix) with ESMTP id C72B845DE61; Mon, 20 Apr 2009 10:55:15 +0900 (JST) Received: from s2.gw.fujitsu.co.jp (s2.gw.fujitsu.co.jp [10.0.50.92]) by m2.gw.fujitsu.co.jp (Postfix) with ESMTP id 923AC45DE57; Mon, 20 Apr 2009 10:55:15 +0900 (JST) Received: from s2.gw.fujitsu.co.jp (localhost.localdomain [127.0.0.1]) by s2.gw.fujitsu.co.jp (Postfix) with ESMTP id 6C3951DB8042; Mon, 20 Apr 2009 10:55:15 +0900 (JST) Received: from ml14.s.css.fujitsu.com (ml14.s.css.fujitsu.com [10.249.87.104]) by s2.gw.fujitsu.co.jp (Postfix) with ESMTP id 247B61DB803C; Mon, 20 Apr 2009 10:55:15 +0900 (JST) Received: from ml14.css.fujitsu.com (ml14 [127.0.0.1]) by ml14.s.css.fujitsu.com (Postfix) with ESMTP id 01E1F9F5FA7; Mon, 20 Apr 2009 10:55:15 +0900 (JST) Received: from [127.0.0.1] (unknown [10.124.100.141]) by ml14.s.css.fujitsu.com (Postfix) with ESMTP id 1CBAC9F603C; Mon, 20 Apr 2009 10:55:14 +0900 (JST) Message-ID: <49EBD5EC.4040905@jp.fujitsu.com> Date: Mon, 20 Apr 2009 10:54:52 +0900 From: Hidetoshi Seto User-Agent: Thunderbird 2.0.0.21 (Windows/20090302) MIME-Version: 1.0 To: linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org CC: Jesse Barnes Subject: [PATCH 1/2] pci, msi: Remove unused/obsolete macros and definitions Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Impact: cleanup, spec compliance This patch does: - Remove unused msi/msix_enable/disable macros. User should use msi/msix_set_enable() functions instead. - Remove unused msix_mask/unmask/pending macros. These macros are useless because they are not based on any of the PCI Local Bus Specifications properly. It seems that they were written based on a draft of PCI spec, and that the draft was the MSI-X ECN that underwent membership review in September 2002. (* In the draft, the size of a entry in MSI-X table was 64bit, containing 32bit message data and DWORD aligned lower address plus a pending bit and a mask bit.(30+1+1bit) The higher address was placed in MSI-X capability structure and shared by all entries.) - Remove PCI_MSIX_FLAGS_BITMASK. This definition also come from the draft ECN. Signed-off-by: Hidetoshi Seto Cc: Jesse Barnes Reviewed-by: Matthew Wilcox --- drivers/pci/msi.h | 8 +------- include/linux/pci_regs.h | 1 - 2 files changed, 1 insertions(+), 8 deletions(-) diff --git a/drivers/pci/msi.h b/drivers/pci/msi.h index 71f4df2..4fed592 100644 --- a/drivers/pci/msi.h +++ b/drivers/pci/msi.h @@ -19,18 +19,12 @@ ( (is64bit == 1) ? base+PCI_MSI_DATA_64 : base+PCI_MSI_DATA_32 ) #define msi_mask_bits_reg(base, is64bit) \ ( (is64bit == 1) ? base+PCI_MSI_MASK_BIT : base+PCI_MSI_MASK_BIT-4) -#define msi_disable(control) control &= ~PCI_MSI_FLAGS_ENABLE #define is_64bit_address(control) (!!(control & PCI_MSI_FLAGS_64BIT)) #define is_mask_bit_support(control) (!!(control & PCI_MSI_FLAGS_MASKBIT)) #define msix_table_offset_reg(base) (base + 0x04) #define msix_pba_offset_reg(base) (base + 0x08) -#define msix_enable(control) control |= PCI_MSIX_FLAGS_ENABLE -#define msix_disable(control) control &= ~PCI_MSIX_FLAGS_ENABLE #define msix_table_size(control) ((control & PCI_MSIX_FLAGS_QSIZE)+1) -#define multi_msix_capable msix_table_size -#define msix_unmask(address) (address & ~PCI_MSIX_FLAGS_BITMASK) -#define msix_mask(address) (address | PCI_MSIX_FLAGS_BITMASK) -#define msix_is_pending(address) (address & PCI_MSIX_FLAGS_PENDMASK) +#define multi_msix_capable(control) msix_table_size((control)) #endif /* MSI_H */ diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h index e4d08c1..ad57aa8 100644 --- a/include/linux/pci_regs.h +++ b/include/linux/pci_regs.h @@ -304,7 +304,6 @@ #define PCI_MSIX_FLAGS_ENABLE (1 << 15) #define PCI_MSIX_FLAGS_MASKALL (1 << 14) #define PCI_MSIX_FLAGS_BIRMASK (7 << 0) -#define PCI_MSIX_FLAGS_BITMASK (1 << 0) /* CompactPCI Hotswap Register */