From patchwork Mon Apr 20 01:54:59 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hidetoshi Seto X-Patchwork-Id: 18960 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n3K1tKmD000729 for ; Mon, 20 Apr 2009 01:55:26 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753554AbZDTBzZ (ORCPT ); Sun, 19 Apr 2009 21:55:25 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1753840AbZDTBzZ (ORCPT ); Sun, 19 Apr 2009 21:55:25 -0400 Received: from fgwmail7.fujitsu.co.jp ([192.51.44.37]:60097 "EHLO fgwmail7.fujitsu.co.jp" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753343AbZDTBzX (ORCPT ); Sun, 19 Apr 2009 21:55:23 -0400 Received: from m5.gw.fujitsu.co.jp ([10.0.50.75]) by fgwmail7.fujitsu.co.jp (Fujitsu Gateway) with ESMTP id n3K1tMd5006726 (envelope-from seto.hidetoshi@jp.fujitsu.com); Mon, 20 Apr 2009 10:55:22 +0900 Received: from smail (m5 [127.0.0.1]) by outgoing.m5.gw.fujitsu.co.jp (Postfix) with ESMTP id 85D5245DE4F; Mon, 20 Apr 2009 10:55:22 +0900 (JST) Received: from s5.gw.fujitsu.co.jp (s5.gw.fujitsu.co.jp [10.0.50.95]) by m5.gw.fujitsu.co.jp (Postfix) with ESMTP id 6683F45DE4E; Mon, 20 Apr 2009 10:55:22 +0900 (JST) Received: from s5.gw.fujitsu.co.jp (localhost.localdomain [127.0.0.1]) by s5.gw.fujitsu.co.jp (Postfix) with ESMTP id 4DEDD1DB8038; Mon, 20 Apr 2009 10:55:22 +0900 (JST) Received: from m105.s.css.fujitsu.com (m105.s.css.fujitsu.com [10.249.87.105]) by s5.gw.fujitsu.co.jp (Postfix) with ESMTP id 021D01DB803C; Mon, 20 Apr 2009 10:55:22 +0900 (JST) Received: from m105.css.fujitsu.com (m105 [127.0.0.1]) by m105.s.css.fujitsu.com (Postfix) with ESMTP id CC87A5D8002; Mon, 20 Apr 2009 10:55:21 +0900 (JST) Received: from [127.0.0.1] (unknown [10.124.100.141]) by m105.s.css.fujitsu.com (Postfix) with ESMTP id 63E575D8001; Mon, 20 Apr 2009 10:55:21 +0900 (JST) Message-ID: <49EBD5F3.9090107@jp.fujitsu.com> Date: Mon, 20 Apr 2009 10:54:59 +0900 From: Hidetoshi Seto User-Agent: Thunderbird 2.0.0.21 (Windows/20090302) MIME-Version: 1.0 To: linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org CC: Jesse Barnes Subject: [PATCH 2/2] pci, msi: Define PCI_MSI_MASK_32/64 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Impact: cleanup, improve readability Define PCI_MSI_MASK_32/64 for 32/64bit devices, instead of using implicit offset (-4), "PCI_MSI_MASK_BIT - 4" and "PCI_MSI_MASK_BIT". Signed-off-by: Hidetoshi Seto Cc: Jesse Barnes Reviewed-by: Matthew Wilcox --- drivers/pci/msi.c | 2 +- drivers/pci/msi.h | 6 +++--- include/linux/pci_regs.h | 3 ++- 3 files changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index 6f2e629..0f4d51b 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c @@ -381,7 +381,7 @@ static int msi_capability_init(struct pci_dev *dev, int nvec) entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */ entry->msi_attrib.pos = pos; - entry->mask_pos = msi_mask_bits_reg(pos, entry->msi_attrib.is_64); + entry->mask_pos = msi_mask_reg(pos, entry->msi_attrib.is_64); /* All MSIs are unmasked by default, Mask them all */ if (entry->msi_attrib.maskbit) pci_read_config_dword(dev, entry->mask_pos, &entry->masked); diff --git a/drivers/pci/msi.h b/drivers/pci/msi.h index 4fed592..a066284 100644 --- a/drivers/pci/msi.h +++ b/drivers/pci/msi.h @@ -16,9 +16,9 @@ #define msi_lower_address_reg(base) (base + PCI_MSI_ADDRESS_LO) #define msi_upper_address_reg(base) (base + PCI_MSI_ADDRESS_HI) #define msi_data_reg(base, is64bit) \ - ( (is64bit == 1) ? base+PCI_MSI_DATA_64 : base+PCI_MSI_DATA_32 ) -#define msi_mask_bits_reg(base, is64bit) \ - ( (is64bit == 1) ? base+PCI_MSI_MASK_BIT : base+PCI_MSI_MASK_BIT-4) + (base + ((is64bit == 1) ? PCI_MSI_DATA_64 : PCI_MSI_DATA_32)) +#define msi_mask_reg(base, is64bit) \ + (base + ((is64bit == 1) ? PCI_MSI_MASK_64 : PCI_MSI_MASK_32)) #define is_64bit_address(control) (!!(control & PCI_MSI_FLAGS_64BIT)) #define is_mask_bit_support(control) (!!(control & PCI_MSI_FLAGS_MASKBIT)) diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h index ad57aa8..a81890a 100644 --- a/include/linux/pci_regs.h +++ b/include/linux/pci_regs.h @@ -295,8 +295,9 @@ #define PCI_MSI_ADDRESS_LO 4 /* Lower 32 bits */ #define PCI_MSI_ADDRESS_HI 8 /* Upper 32 bits (if PCI_MSI_FLAGS_64BIT set) */ #define PCI_MSI_DATA_32 8 /* 16 bits of data for 32-bit devices */ +#define PCI_MSI_MASK_32 12 /* Mask bits register for 32-bit devices */ #define PCI_MSI_DATA_64 12 /* 16 bits of data for 64-bit devices */ -#define PCI_MSI_MASK_BIT 16 /* Mask bits register */ +#define PCI_MSI_MASK_64 16 /* Mask bits register for 64-bit devices */ /* MSI-X registers (these are at offset PCI_MSIX_FLAGS) */ #define PCI_MSIX_FLAGS 2