diff mbox

[1/14] PCI ASPM: fix typo in struct pcie_link_state

Message ID 4A0A3A65.1000309@jp.fujitsu.com (mailing list archive)
State Accepted, archived
Headers show

Commit Message

Kenji Kaneshige May 13, 2009, 3:11 a.m. UTC
Fix a typo in struct pcie_link_state.

The "sibiling" field in the struct pcie_link_state should be
"sibling".

Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>

---
 drivers/pci/pcie/aspm.c |   14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)



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Comments

Jesse Barnes June 18, 2009, 9:05 p.m. UTC | #1
On Wed, 13 May 2009 12:11:33 +0900
Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> wrote:

> Fix a typo in struct pcie_link_state.
> 
> The "sibiling" field in the struct pcie_link_state should be
> "sibling".
> 
> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>

Applied this series.  There was one conflict with Shaohua's VIA quirk,
but the resolution was trivial, so I think it's ok.
diff mbox

Patch

Index: 20090508/drivers/pci/pcie/aspm.c
===================================================================
--- 20090508.orig/drivers/pci/pcie/aspm.c
+++ 20090508/drivers/pci/pcie/aspm.c
@@ -32,7 +32,7 @@  struct endpoint_state {
 };
 
 struct pcie_link_state {
-	struct list_head sibiling;
+	struct list_head sibling;
 	struct pci_dev *pdev;
 	bool downstream_has_switch;
 
@@ -541,7 +541,7 @@  static void __pcie_aspm_configure_link_s
 	state &= PCIE_LINK_STATE_L0S|PCIE_LINK_STATE_L1;
 
 	/* check all links who have specific root port link */
-	list_for_each_entry(leaf, &link_list, sibiling) {
+	list_for_each_entry(leaf, &link_list, sibling) {
 		if (!list_empty(&leaf->children) ||
 			get_root_port_link(leaf) != root_port_link)
 			continue;
@@ -558,12 +558,12 @@  static void __pcie_aspm_configure_link_s
 	 * __pcie_aspm_config_link for the order
 	 **/
 	if (state & PCIE_LINK_STATE_L1) {
-		list_for_each_entry(leaf, &link_list, sibiling) {
+		list_for_each_entry(leaf, &link_list, sibling) {
 			if (get_root_port_link(leaf) == root_port_link)
 				__pcie_aspm_config_link(leaf->pdev, state);
 		}
 	} else {
-		list_for_each_entry_reverse(leaf, &link_list, sibiling) {
+		list_for_each_entry_reverse(leaf, &link_list, sibling) {
 			if (get_root_port_link(leaf) == root_port_link)
 				__pcie_aspm_config_link(leaf->pdev, state);
 		}
@@ -678,7 +678,7 @@  void pcie_aspm_init_link_state(struct pc
 	}
 
 	link_state->pdev = pdev;
-	list_add(&link_state->sibiling, &link_list);
+	list_add(&link_state->sibling, &link_list);
 
 	if (link_state->downstream_has_switch) {
 		/*
@@ -725,7 +725,7 @@  void pcie_aspm_exit_link_state(struct pc
 
 	/* All functions are removed, so just disable ASPM for the link */
 	__pcie_aspm_config_one_dev(parent, 0);
-	list_del(&link_state->sibiling);
+	list_del(&link_state->sibling);
 	list_del(&link_state->link);
 	/* Clock PM is for endpoint device */
 
@@ -802,7 +802,7 @@  static int pcie_aspm_set_policy(const ch
 	down_read(&pci_bus_sem);
 	mutex_lock(&aspm_lock);
 	aspm_policy = i;
-	list_for_each_entry(link_state, &link_list, sibiling) {
+	list_for_each_entry(link_state, &link_list, sibling) {
 		pdev = link_state->pdev;
 		__pcie_aspm_configure_link_state(pdev,
 			policy_to_aspm_state(pdev));