From patchwork Tue Sep 15 08:25:17 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kenji Kaneshige X-Patchwork-Id: 47605 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n8F8PajD015376 for ; Tue, 15 Sep 2009 08:25:36 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754322AbZIOIZc (ORCPT ); Tue, 15 Sep 2009 04:25:32 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1755772AbZIOIZc (ORCPT ); Tue, 15 Sep 2009 04:25:32 -0400 Received: from fgwmail6.fujitsu.co.jp ([192.51.44.36]:35029 "EHLO fgwmail6.fujitsu.co.jp" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754322AbZIOIZa (ORCPT ); Tue, 15 Sep 2009 04:25:30 -0400 Received: from m6.gw.fujitsu.co.jp ([10.0.50.76]) by fgwmail6.fujitsu.co.jp (Fujitsu Gateway) with ESMTP id n8F8PXjo021910 for (envelope-from kaneshige.kenji@jp.fujitsu.com); Tue, 15 Sep 2009 17:25:33 +0900 Received: from smail (m6 [127.0.0.1]) by outgoing.m6.gw.fujitsu.co.jp (Postfix) with ESMTP id 1B83E45DE52 for ; Tue, 15 Sep 2009 17:25:33 +0900 (JST) Received: from s6.gw.fujitsu.co.jp (s6.gw.fujitsu.co.jp [10.0.50.96]) by m6.gw.fujitsu.co.jp (Postfix) with ESMTP id CDFA745DE55 for ; Tue, 15 Sep 2009 17:25:32 +0900 (JST) Received: from s6.gw.fujitsu.co.jp (localhost.localdomain [127.0.0.1]) by s6.gw.fujitsu.co.jp (Postfix) with ESMTP id 41EB21DB8037 for ; Tue, 15 Sep 2009 17:25:32 +0900 (JST) Received: from m106.s.css.fujitsu.com (m106.s.css.fujitsu.com [10.249.87.106]) by s6.gw.fujitsu.co.jp (Postfix) with ESMTP id 9A7F01DB804C for ; Tue, 15 Sep 2009 17:25:30 +0900 (JST) Received: from m106.css.fujitsu.com (m106 [127.0.0.1]) by m106.s.css.fujitsu.com (Postfix) with ESMTP id 5632E5B890E; Tue, 15 Sep 2009 17:25:30 +0900 (JST) Received: from [127.0.0.1] (unknown [10.124.100.137]) by m106.s.css.fujitsu.com (Postfix) with ESMTP id E18055B88E7; Tue, 15 Sep 2009 17:25:29 +0900 (JST) X-SecurityPolicyCheck-FJ: OK by FujitsuOutboundMailChecker v1.3.1 Received: from KANE-LIFEBOOK[10.124.100.137] by KANE-LIFEBOOK (FujitsuOutboundMailChecker v1.3.1/9992[10.124.100.137]); Tue, 15 Sep 2009 17:25:21 +0900 (JST) Message-ID: <4AAF4F6D.9060308@jp.fujitsu.com> Date: Tue, 15 Sep 2009 17:25:17 +0900 From: Kenji Kaneshige User-Agent: Thunderbird 2.0.0.23 (Windows/20090812) MIME-Version: 1.0 To: linux-pci@vger.kernel.org, jbarnes@virtuousgeek.org CC: ebiederm@xmission.com Subject: [PATCH 2/15] pciehp: remove num_slots field References: <4AAF4F16.802@jp.fujitsu.com> In-Reply-To: <4AAF4F16.802@jp.fujitsu.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Since PCIe downstream port has only one slot at most, we don't need num_slots field in struct controller. Note that struct controller itself doesn't exist if PCIe downstream port has no slot. Signed-off-by: Kenji Kaneshige --- drivers/pci/hotplug/pciehp.h | 1 - drivers/pci/hotplug/pciehp_hpc.c | 1 - 2 files changed, 2 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Index: 20090915/drivers/pci/hotplug/pciehp.h =================================================================== --- 20090915.orig/drivers/pci/hotplug/pciehp.h +++ 20090915/drivers/pci/hotplug/pciehp.h @@ -93,7 +93,6 @@ struct event_info { struct controller { struct mutex crit_sect; /* critical section mutex */ struct mutex ctrl_lock; /* controller lock */ - int num_slots; /* Number of slots on ctlr */ int slot_num_inc; /* 1 or -1 */ struct pci_dev *pci_dev; struct pcie_device *pcie; /* PCI Express port service */ Index: 20090915/drivers/pci/hotplug/pciehp_hpc.c =================================================================== --- 20090915.orig/drivers/pci/hotplug/pciehp_hpc.c +++ 20090915/drivers/pci/hotplug/pciehp_hpc.c @@ -1025,7 +1025,6 @@ struct controller *pcie_init(struct pcie ctrl->slot_cap = slot_cap; ctrl->first_slot = slot_cap >> 19; ctrl->slot_device_offset = 0; - ctrl->num_slots = 1; ctrl->hpc_ops = &pciehp_hpc_ops; mutex_init(&ctrl->crit_sect); mutex_init(&ctrl->ctrl_lock);