@@ -96,7 +96,6 @@ struct controller {
struct timer_list poll_timer;
unsigned long cmd_started; /* jiffies */
unsigned int cmd_busy:1;
- unsigned int no_cmd_complete:1;
unsigned int link_active_reporting:1;
unsigned int notification_enabled:1;
unsigned int power_fault_detected;
@@ -140,7 +140,7 @@ static void pcie_wait_cmd(struct controller *ctrl)
* If the controller does not generate notifications for command
* completions, we never need to wait between writes.
*/
- if (ctrl->no_cmd_complete)
+ if (NO_CMD_CMPL(ctrl))
return;
if (!ctrl->cmd_busy)
@@ -772,15 +772,6 @@ struct controller *pcie_init(struct pcie_device *dev)
init_waitqueue_head(&ctrl->queue);
dbg_ctrl(ctrl);
- /*
- * Controller doesn't notify of command completion if the "No
- * Command Completed Support" bit is set in Slot Capabilities.
- * If set, it means the controller can accept hotplug commands
- * with no delay between them.
- */
- if (NO_CMD_CMPL(ctrl))
- ctrl->no_cmd_complete = 1;
-
/* Check if Data Link Layer Link Active Reporting is implemented */
pcie_capability_read_dword(pdev, PCI_EXP_LNKCAP, &link_cap);
if (link_cap & PCI_EXP_LNKCAP_DLLLARC) {