From patchwork Wed Nov 5 17:58:31 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Barto X-Patchwork-Id: 5237231 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 6FC629F295 for ; Wed, 5 Nov 2014 18:05:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8DE5E20172 for ; Wed, 5 Nov 2014 18:05:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8EB5920108 for ; Wed, 5 Nov 2014 18:05:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751113AbaKESFF (ORCPT ); Wed, 5 Nov 2014 13:05:05 -0500 Received: from smtp1.tech.numericable.fr ([82.216.111.37]:34693 "EHLO smtp1.tech.numericable.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750873AbaKESFE (ORCPT ); Wed, 5 Nov 2014 13:05:04 -0500 X-Greylist: delayed 377 seconds by postgrey-1.27 at vger.kernel.org; Wed, 05 Nov 2014 13:05:04 EST Received: from [192.168.0.10] (87-231-245-37.rev.numericable.fr [87.231.245.37]) by smtp1.tech.numericable.fr (Postfix) with ESMTP id 4FAD714017D; Wed, 5 Nov 2014 18:58:44 +0100 (CET) Message-ID: <545A6547.1030709@laposte.net> Date: Wed, 05 Nov 2014 18:58:31 +0100 From: Barto User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: Tejun Heo CC: bhelgaas@google.com, aaron.lu@intel.com, rjw@rjwysocki.net, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, chuansheng.liu@intel.com Subject: Re: [PATCH] PCI: Do not enable async suspend for JMicron chips References: <1415149665-26669-1-git-send-email-chuansheng.liu@intel.com> <20141105163159.GE14386@htj.dyndns.org> In-Reply-To: <20141105163159.GE14386@htj.dyndns.org> X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: 0 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeejhedrhedvgddugecutefuodetggdotefrucfrrhhofhhilhgvmecupfgfoffgtffkveetuefngfenuceurghilhhouhhtmecufedttdenucenucfjughrpefkfffhfgggvffufhgjtgfgsehtkegrtddtfeehnecuhfhrohhmpeeurghrthhouceomhhishhtvghrrdhfrhgvvghmrghnsehlrghpohhsthgvrdhnvghtqeenucffohhmrghinhepphgtihdrtgdqqddqrg Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00,FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP I tried the patch, it solves the problem, but I had to change the patch in order to be compatible with 3.18rc3 source code : patching file drivers/pci/pci.c Hunk #1 FAILED at 2046. 1 out of 1 hunk FAILED -- saving rejects to file drivers/pci/pci.c.rej here is the correct patch for kernel 3.18rc3 source code : Le 05/11/2014 17:31, Tejun Heo a écrit : > On Wed, Nov 05, 2014 at 09:07:45AM +0800, Chuansheng Liu wrote: >> The JMicron chip 361/363/368 contains one SATA controller and >> one PATA controller, they are brother-relation ship in PCI tree, >> but for powering on these both controller, we must follow the >> sequence one by one, otherwise one of them can not be powered on >> successfully. >> >> So here we disable the async suspend method for Jmicron chip. >> >> Cc: stable@vger.kernel.org # 3.15+ >> Signed-off-by: Chuansheng Liu > > Applied to libata/for-3.18-fixes. > > Thanks. > --- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -2046,7 +2046,17 @@ void pci_pm_init(struct pci_dev *dev) pm_runtime_forbid(&dev->dev); pm_runtime_set_active(&dev->dev); pm_runtime_enable(&dev->dev); - device_enable_async_suspend(&dev->dev); + + /* + * The JMicron chip 361/363/368 contains one SATA controller and + * one PATA controller, they are brother-relation ship in PCI tree, + * but for powering on these both controller, we must follow the + * sequence one by one, otherwise one of them can not be powered on + * successfully, so here we disable the async suspend method for + * Jmicron chip. + */ + if (dev->vendor != PCI_VENDOR_ID_JMICRON) + device_enable_async_suspend(&dev->dev); dev->wakeup_prepared = false; dev->pm_cap = 0;