From patchwork Tue Aug 30 12:17:57 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 9305303 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 06EC4607F0 for ; Tue, 30 Aug 2016 12:18:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EBB6628BBF for ; Tue, 30 Aug 2016 12:18:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E019B28BC1; Tue, 30 Aug 2016 12:18:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3952128BBF for ; Tue, 30 Aug 2016 12:18:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758215AbcH3MSC (ORCPT ); Tue, 30 Aug 2016 08:18:02 -0400 Received: from foss.arm.com ([217.140.101.70]:38550 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755916AbcH3MSC (ORCPT ); Tue, 30 Aug 2016 08:18:02 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id ACA9C349; Tue, 30 Aug 2016 05:18:00 -0700 (PDT) Received: from [10.1.207.16] (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D15903F445; Tue, 30 Aug 2016 05:17:58 -0700 (PDT) Subject: Re: [PATCH 3/3] PCI: Xilinx NWL PCIe: Fix Error for multi function device for legacy interrupts. To: Bharat Kumar Gogada , robh@kernel.org, bhelgaas@google.com, colin.king@canonical.com, soren.brinkmann@xilinx.com, michal.simek@xilinx.com, arnd@arndb.de References: <1472553558-27215-1-git-send-email-bharatku@xilinx.com> <1472553558-27215-3-git-send-email-bharatku@xilinx.com> Cc: linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, rgummal@xilinx.com, Bharat Kumar Gogada From: Marc Zyngier X-Enigmail-Draft-Status: N1110 Organization: ARM Ltd Message-ID: <57C57975.7040306@arm.com> Date: Tue, 30 Aug 2016 13:17:57 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Icedove/38.7.0 MIME-Version: 1.0 In-Reply-To: <1472553558-27215-3-git-send-email-bharatku@xilinx.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hi Bharat, On 30/08/16 11:39, Bharat Kumar Gogada wrote: > PCIe legacy interrupts start at 1, not at 0. > When testing with multi function device "error: hwirq 0x4 is too large for > dummy" error comes. > So adding one addtional interrupt when creating irq domain. > > Signed-off-by: Bharat Kumar Gogada > --- > drivers/pci/host/pcie-xilinx-nwl.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/pci/host/pcie-xilinx-nwl.c b/drivers/pci/host/pcie-xilinx-nwl.c > index d8d43e6..9f04411 100644 > --- a/drivers/pci/host/pcie-xilinx-nwl.c > +++ b/drivers/pci/host/pcie-xilinx-nwl.c > @@ -561,7 +561,7 @@ static int nwl_pcie_init_irq_domain(struct nwl_pcie *pcie) > } > > pcie->legacy_irq_domain = irq_domain_add_linear(legacy_intc_node, > - INTX_NUM, > + INTX_NUM + 1, > &legacy_domain_ops, > pcie); This feels like the wrong thing to do. You have INTX_NUM irqs, so the domain allocation should reflect this. On the other hand, the way the driver currently deals with mappings is quite broken (consistently adding 1 to the HW interrupt). How about something like this instead? I may have missed a few things, but you'll get the idea. Thanks, M. Acked-by: Marc Zyngier diff --git a/drivers/pci/host/pcie-xilinx-nwl.c b/drivers/pci/host/pcie-xilinx-nwl.c index 0b597d9..72b159f 100644 --- a/drivers/pci/host/pcie-xilinx-nwl.c +++ b/drivers/pci/host/pcie-xilinx-nwl.c @@ -314,8 +314,7 @@ static void nwl_pcie_leg_handler(struct irq_desc *desc) while ((status = nwl_bridge_readl(pcie, MSGF_LEG_STATUS) & MSGF_LEG_SR_MASKALL) != 0) { for_each_set_bit(bit, &status, INTX_NUM) { - virq = irq_find_mapping(pcie->legacy_irq_domain, - bit + 1); + virq = irq_find_mapping(pcie->legacy_irq_domain, bit); if (virq) generic_handle_irq(virq); } @@ -483,7 +482,7 @@ static void nwl_pcie_free_irq_domain(struct nwl_pcie *pcie) u32 irq; for (i = 0; i < INTX_NUM; i++) { - irq = irq_find_mapping(pcie->legacy_irq_domain, i + 1); + irq = irq_find_mapping(pcie->legacy_irq_domain, i); if (irq > 0) irq_dispose_mapping(irq); }