From patchwork Wed Mar 16 22:12:57 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 8604901 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 8A5FE9F294 for ; Wed, 16 Mar 2016 22:13:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9EB4D202AE for ; Wed, 16 Mar 2016 22:13:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A96002026F for ; Wed, 16 Mar 2016 22:13:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934707AbcCPWM7 (ORCPT ); Wed, 16 Mar 2016 18:12:59 -0400 Received: from mail-io0-f176.google.com ([209.85.223.176]:34301 "EHLO mail-io0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932608AbcCPWM6 (ORCPT ); Wed, 16 Mar 2016 18:12:58 -0400 Received: by mail-io0-f176.google.com with SMTP id m184so77012027iof.1 for ; Wed, 16 Mar 2016 15:12:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc; bh=WQDzG7rRlmCxwfPYnc48g0+aedWEBfAsn35OvfrR7qk=; b=e6x3EU9xsITRiDnhH5VgCjPHDY+VljlTk27AxCjh/3MTnVssYYehJ2fq0ZIrB2J7hS uZTDtgiGYbjT2NsB24IzJCB7h3nloELxUM260f76xCOSajImvq18CE2RAYuYadRJXSqd KvDEkD2AoX4kZh91BuLuF8LXsWTmYTM2qiYg4PioDg+wl7dzrQgcgnpOGiE0qf1t4jvv bWE2MFQOhkzggkfO+yqGV+zCHSOvfa6QqQEyGGN8Y7ihu9iqgdOUEuY+z/fkYv5iGfGh UpawU4Zjn24m1qTbFhjfDSTuQK/Dx6EaObbuVxfRJhGCELOOixue6/z+D5nQahM5qW5Z xu3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc; bh=WQDzG7rRlmCxwfPYnc48g0+aedWEBfAsn35OvfrR7qk=; b=aDkx0bnXEADA9UOR1A43gmu97ppA57vp3tYvXuzSUIuKwLy4v2A4afRwCW2F/EIBGu osH3rVmuE52s4Lw8SJeeo24zwoZEm0WttNKTsQB5F1d2TXiTs6ngaE7eYPNxZpCppoPh a+QwAz/LErztFXOb8iqo1D6D8A57ZJfpTNBVB2+ddODB/1rF8QMx9fn0ZjazCKkcnaPt T9ZDD2yGY2DGoyracXQJSh8QZXFR5WrjS4n0bOYkxQvRx6GBgLoqUsSrqFz4DH5E2/+s VasD8TIzfIqz3LBGOsmKuKatDJfDgo4YmEjXRLh/QpSxDkJUKYRHNetxFAbD5bvvTE+x VxAw== X-Gm-Message-State: AD7BkJLtwRV/9KvmdRawhqA2rv37ImJo8fUJOCzGimPuc5dx5jQjdY+9tdKEa4JKKytib5/vGMoRzCpZWSC8Uw== MIME-Version: 1.0 X-Received: by 10.107.33.7 with SMTP id h7mr6218246ioh.30.1458166377331; Wed, 16 Mar 2016 15:12:57 -0700 (PDT) Received: by 10.79.67.2 with HTTP; Wed, 16 Mar 2016 15:12:57 -0700 (PDT) In-Reply-To: References: <56D5E3DF.9030906@tekno-soft.it> <56D71F27.7070708@tekno-soft.it> <20160302195634.GA19223@localhost> <56D80435.90408@tekno-soft.it> <56D8180A.1050708@tekno-soft.it> <56D84B6D.1050800@tekno-soft.it> <56D883AD.5060601@tekno-soft.it> <56DEE426.8030902@tekno-soft.it> <1457448829.3207.22.camel@pengutronix.de> <56E1B04A.9010206@tekno-soft.it> <56E679FE.20409@tekno-soft.it> <56E7ED1E.3070506@tekno-soft.it> <56E81C56.8060404@tekno-soft.it> Date: Wed, 16 Mar 2016 19:12:57 -0300 Message-ID: Subject: Re: iMX6q PCIe phy link never came up on kernel v4.4.x From: Fabio Estevam To: Tim Harvey Cc: Roberto Fichera , Lucas Stach , Richard Zhu , Bjorn Helgaas , "linux-pci@vger.kernel.org" , Richard Zhu Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Wed, Mar 16, 2016 at 6:33 PM, Tim Harvey wrote: > Fabio, > > The board combination I have where an XIO2001 is connected directly to > an IMX6 is a bit different from Roberto's setup. In our configuration > the XIO2001 is on an 'expansion' board that its own local PCI clock > generation. So, in my case the XIO2001 always has a valid clock > before/during/after its reset. This is different from Roberto's > scenario. I do recall running into an issue with the XIO2001 on > another product with a different host controller that had to do with > noise on the clk prior to its reset being asserted so I am not too > surprised at what Roberto has found. > > I don't specifically see an issue with a change that asserts PCI_RST# > before the CLK gets enabled then de-asserts it after at least 100ms > has expired from clock enable - I think that actually follows the > specs wording closer than what we currently do (turning o the clock > prior to assert/de-assert reset). However I get very nervous at any > change to the IMX6 PCIe init. We have found it to be very finicky > because of the lack of a proper reset. Would this be the minimal change to get Roberto's setup working with 4.5? * touch it for configuration. As there is no dedicated reset signal @@ -305,7 +314,6 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp) /* Some boards don't have PCIe reset GPIO. */ if (imx6_pcie->reset_gpio) { - gpiod_set_value_cansleep(imx6_pcie->reset_gpio, 0); msleep(100); gpiod_set_value_cansleep(imx6_pcie->reset_gpio, 1); } > Roberto, > > Did you require the changes regarding Gen2 negotiation? My > IMX6+XIO2001 links reliably at Gen1 which makes sense for that chip. Yes, it would be nice if Roberto could clarify if the Gen2 changes are needed or not. Also, is this change also really required? regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_TEST_PD, 1 << 18); + udelay(10); regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_REF_CLK_EN, 0 << 16); --- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html --- a/drivers/pci/host/pci-imx6.c +++ b/drivers/pci/host/pci-imx6.c @@ -232,6 +232,15 @@ static int imx6_pcie_assert_core_reset(struct pcie_port *pp) u32 val, gpr1, gpr12; /* + * Some PCI bridges such as TI XIO2001 require PERST to be + * asserted before enabling the PCIe ref_clk, otherwise it will + * get "confused" and the PCIe link state will stuck in POLL_STATE + */ + + if (gpio_is_valid(imx6_pcie->reset_gpio)) + gpiod_set_value_cansleep(imx6_pcie->reset_gpio, 0); + + /* * If the bootloader already enabled the link we need some special * handling to get the core back into a state where it is safe to