| Message ID | DS7PR19MB88835F541CBC60C97A818B3A9DD22@DS7PR19MB8883.namprd19.prod.outlook.com (mailing list archive) |
|---|---|
| State | New |
| Delegated to: | Krzysztof Wilczyński |
| Headers | show |
| Series | Enable IPQ5018 PCI support | expand |
On Fri, Mar 14, 2025 at 09:56:39AM +0400, George Moussalem wrote: > From: Nitheesh Sekar <quic_nsekar@quicinc.com> > > The IPQ5018 SoC contains a Gen2 1 and 2-lane PCIe UNIPHY which is the > same as the one found in IPQ5332. As such, add IPQ5018 compatible. > > Signed-off-by: Nitheesh Sekar <quic_nsekar@quicinc.com> > Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> > Signed-off-by: George Moussalem <george.moussalem@outlook.com> > --- > .../devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml index e39168d55d23..bdfa3417069c 100644 --- a/Documentation/devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml @@ -11,11 +11,12 @@ maintainers: - Varadarajan Narayanan <quic_varada@quicinc.com> description: - PCIe and USB combo PHY found in Qualcomm IPQ5332 SoC + PCIe and USB combo PHY found in Qualcomm IPQ5018 & IPQ5332 SoCs properties: compatible: enum: + - qcom,ipq5018-uniphy-pcie-phy - qcom,ipq5332-uniphy-pcie-phy reg: