From patchwork Thu Apr 9 17:05:05 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Duc Dang X-Patchwork-Id: 6189631 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 960E89F398 for ; Thu, 9 Apr 2015 17:05:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A6A8A20395 for ; Thu, 9 Apr 2015 17:05:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B2DBE2037E for ; Thu, 9 Apr 2015 17:05:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755724AbbDIRFw (ORCPT ); Thu, 9 Apr 2015 13:05:52 -0400 Received: from exprod5og121.obsmtp.com ([64.18.0.139]:48985 "EHLO mail-pd0-f178.google.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1755723AbbDIRFr (ORCPT ); Thu, 9 Apr 2015 13:05:47 -0400 Received: from mail-pd0-f178.google.com ([209.85.192.178]) (using TLSv1) by exprod5ob121.postini.com ([64.18.4.12]) with SMTP ID DSNKVSaxauVXr1I9sS2dM/HSq1mwL2t4lPUO@postini.com; Thu, 09 Apr 2015 10:05:47 PDT Received: by pddn5 with SMTP id n5so159150746pdd.2 for ; Thu, 09 Apr 2015 10:05:46 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=XcLKuXTmu/ZeiJGeGzQVP8kZcnEx+SIPLMNPG8bllc8=; b=I0d3WyZl4ovqOMKiMzwrk2xrrww6L4/ALj24Nl8Ol2TJoP17dIGCHgAiFm6RNE9ltA VwbG6IOjwZjJUSYy1WgaeaCS367ospRhNWTxt2iOluDNd8wddOyLs5O+LWrlp6aEi4sR Ez6puICAPsrDdTOwZuwBvVA5Rg5KoVSALhxlScIkvjDK20zgDfR0tdlUNtss8RD5xlpB 35Vy5IoSF7ose4Te3YKT7nHrUFDz9bf69RlWRNiLj1E1Yl+VeDdndzJDge0RCDqAqnI7 /rh9p4RprNQZTMAww90hxqxfMqaa50nvo9+JQqAr6BAZqKNKP2CwEilz/PaS/KrkEKNi sQ2w== X-Gm-Message-State: ALoCoQlBtzfAIVYR7B7YTfNRhEoVsScRaF4OEpx2nGlMgOVKoYEE8wig3VuFpf4JtPvikak4TfLpvJPm1jkR332rxLNPdfPwo8k02AoX1zJXK55Y7RjCLFHi0EEecM6pKIYqGMBbr2JALs8OAB/QvWhmQDZCd0Ty7g== X-Received: by 10.68.172.131 with SMTP id bc3mr56775611pbc.107.1428599146255; Thu, 09 Apr 2015 10:05:46 -0700 (PDT) X-Received: by 10.68.172.131 with SMTP id bc3mr56775595pbc.107.1428599146145; Thu, 09 Apr 2015 10:05:46 -0700 (PDT) Received: from dhdang-Precision-WorkStation-T3400.amcc.com (67-207-112-226.static.wiline.com. [67.207.112.226]) by mx.google.com with ESMTPSA id hs4sm15127784pdb.30.2015.04.09.10.05.44 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 09 Apr 2015 10:05:45 -0700 (PDT) From: Duc Dang To: Bjorn Helgaas , Arnd Bergmann , Grant Likely , Liviu Dudau , Marc Zyngier Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Tanmay Inamdar , Loc Ho , Feng Kan , Duc Dang Subject: [PATCH v3 3/4] documentation: dts: Add the device tree binding for APM X-Gene v1 PCIe MSI device tree node Date: Thu, 9 Apr 2015 10:05:05 -0700 Message-Id: X-Mailer: git-send-email 1.9.1 In-Reply-To: References: In-Reply-To: References: <20150408084448.5f0793b7@why.wild-wind.fr.eu.org> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The driver for this binding is under 'drivers/pci/host/pci-xgene-msi.c' Signed-off-by: Duc Dang Signed-off-by: Tanmay Inamdar --- .../devicetree/bindings/pci/xgene-pci-msi.txt | 63 ++++++++++++++++++++++ 1 file changed, 63 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/xgene-pci-msi.txt diff --git a/Documentation/devicetree/bindings/pci/xgene-pci-msi.txt b/Documentation/devicetree/bindings/pci/xgene-pci-msi.txt new file mode 100644 index 0000000..0ffdcb3 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/xgene-pci-msi.txt @@ -0,0 +1,63 @@ +* AppliedMicro X-Gene PCIe MSI interface + +Required properties: + +- compatible: should contain "apm,xgene1-msi" to identify the core. +- msi-controller: indicates that this is X-Gene1 PCIe MSI controller node +- reg: A list of physical base address and length for each set of controller + registers. +- interrupts: A list of interrupt outputs of the controller. + +Each PCIe node needs to have property msi-parent that points to msi controller node + +Examples: + +SoC DTSI: + + + MSI node: + msi@79000000 { + compatible = "apm,xgene1-msi"; + msi-controller; + reg = <0x00 0x79000000 0x0 0x900000>; + interrupts = < 0x0 0x10 0x4 + 0x0 0x11 0x4 + 0x0 0x12 0x4 + 0x0 0x13 0x4 + 0x0 0x14 0x4 + 0x0 0x15 0x4 + 0x0 0x16 0x4 + 0x0 0x17 0x4 + 0x0 0x18 0x4 + 0x0 0x19 0x4 + 0x0 0x1a 0x4 + 0x0 0x1b 0x4 + 0x0 0x1c 0x4 + 0x0 0x1d 0x4 + 0x0 0x1e 0x4 + 0x0 0x1f 0x4>; + }; + + + PCIe controller node with msi-parent property pointing to MSI node: + pcie0: pcie@1f2b0000 { + status = "disabled"; + device_type = "pci"; + compatible = "apm,xgene-storm-pcie", "apm,xgene-pcie"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = < 0x00 0x1f2b0000 0x0 0x00010000 /* Controller registers */ + 0xe0 0xd0000000 0x0 0x00040000>; /* PCI config space */ + reg-names = "csr", "cfg"; + ranges = <0x01000000 0x00 0x00000000 0xe0 0x10000000 0x00 0x00010000 /* io */ + 0x02000000 0x00 0x80000000 0xe1 0x80000000 0x00 0x80000000>; /* mem */ + dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000 + 0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc2 0x1 + 0x0 0x0 0x0 0x2 &gic 0x0 0xc3 0x1 + 0x0 0x0 0x0 0x3 &gic 0x0 0xc4 0x1 + 0x0 0x0 0x0 0x4 &gic 0x0 0xc5 0x1>; + dma-coherent; + clocks = <&pcie0clk 0>; + msi-parent= <&msi>; + };