From patchwork Fri Sep 18 19:58:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuppuswamy Sathyanarayanan X-Patchwork-Id: 11785959 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 19E41618 for ; Fri, 18 Sep 2020 20:03:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 07A6922208 for ; Fri, 18 Sep 2020 20:03:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726262AbgIRUDk (ORCPT ); Fri, 18 Sep 2020 16:03:40 -0400 Received: from mga12.intel.com ([192.55.52.136]:55347 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726139AbgIRUDk (ORCPT ); Fri, 18 Sep 2020 16:03:40 -0400 IronPort-SDR: 7LyqZMwK8io+MvJcN8xNbzxdOY7uTgYMwtFSOE9AQ4UPHjWX6f8iFMeYuTeOseu/dmS5TOuFEp yoD/mo9kUHEg== X-IronPort-AV: E=McAfee;i="6000,8403,9748"; a="139519428" X-IronPort-AV: E=Sophos;i="5.77,274,1596524400"; d="scan'208";a="139519428" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Sep 2020 12:58:36 -0700 IronPort-SDR: CdozuX/OD++iyTLRl/RlCw3GXWbaM3hct99mLAvRS4Z8QHwf3WKyRJQQ3aJpvt8v/9uERs/wkx UUBqRvgu9oBw== X-IronPort-AV: E=Sophos;i="5.77,274,1596524400"; d="scan'208";a="303453422" Received: from pbashab-mobl2.amr.corp.intel.com (HELO skuppusw-mobl5.amr.corp.intel.com) ([10.254.127.73]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Sep 2020 12:58:36 -0700 From: sathyanarayanan.kuppuswamy@linux.intel.com To: bhelgaas@google.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, ashok.raj@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com Subject: [PATCH v9 1/5] PCI: Conditionally initialize host bridge native_* members Date: Fri, 18 Sep 2020 12:58:30 -0700 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Kuppuswamy Sathyanarayanan If CONFIG_PCIEPORTBUS is not enabled in kernel then initialing struct pci_host_bridge PCIe specific native_* members to "1" is incorrect. So protect the PCIe specific member initialization with CONFIG_PCIEPORTBUS. Signed-off-by: Kuppuswamy Sathyanarayanan --- drivers/pci/probe.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 03d37128a24f..0da0fc034413 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -588,12 +588,14 @@ static void pci_init_host_bridge(struct pci_host_bridge *bridge) * may implement its own AER handling and use _OSC to prevent the * OS from interfering. */ +#ifdef CONFIG_PCIEPORTBUS bridge->native_aer = 1; bridge->native_pcie_hotplug = 1; - bridge->native_shpc_hotplug = 1; bridge->native_pme = 1; - bridge->native_ltr = 1; bridge->native_dpc = 1; +#endif + bridge->native_ltr = 1; + bridge->native_shpc_hotplug = 1; device_initialize(&bridge->dev); }