| Message ID | c441872d7dd355ae09e945447441389e93e3b888.1527621510.git.leonard.crestez@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Delegated to: | Bjorn Helgaas |
| Headers | show |
Am Dienstag, den 29.05.2018, 22:39 +0300 schrieb Leonard Crestez: > Right now the only user of reset-imx7 is pci-imx6 and the > reset_control_assert and deassert calls on pciephy_reset don't toggle > the PCIEPHY_BTN and PCIEPHY_G_RST bits as expected. Fix this by writing > 1 or 0 respectively. > > The reference manual is not very clear regarding SRC_PCIEPHY_RCR but for > other registers like MIPIPHY and HSICPHY the bits are explicitly > documented as "1 means assert, 0 means deassert". > > The values are still reversed for IMX7_RESET_PCIE_CTRL_APPS_EN. > > Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> > --- > drivers/reset/reset-imx7.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c > index 4db177bc89bc..fdeac1946429 100644 > --- a/drivers/reset/reset-imx7.c > +++ b/drivers/reset/reset-imx7.c > @@ -78,11 +78,11 @@ static struct imx7_src *to_imx7_src(struct reset_controller_dev *rcdev) > static int imx7_reset_set(struct reset_controller_dev *rcdev, > > unsigned long id, bool assert) > { > > struct imx7_src *imx7src = to_imx7_src(rcdev); > > const struct imx7_src_signal *signal = &imx7_src_signals[id]; > > - unsigned int value = 0; > > + unsigned int value = assert ? signal->bit : 0; > > > switch (id) { > > case IMX7_RESET_PCIEPHY: > > /* > > * wait for more than 10us to release phy g_rst and
On Tue, May 29, 2018 at 10:39:16PM +0300, Leonard Crestez wrote: > Right now the only user of reset-imx7 is pci-imx6 and the > reset_control_assert and deassert calls on pciephy_reset don't toggle > the PCIEPHY_BTN and PCIEPHY_G_RST bits as expected. Fix this by writing > 1 or 0 respectively. > > The reference manual is not very clear regarding SRC_PCIEPHY_RCR but for > other registers like MIPIPHY and HSICPHY the bits are explicitly > documented as "1 means assert, 0 means deassert". > > The values are still reversed for IMX7_RESET_PCIE_CTRL_APPS_EN. > > Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> > --- > drivers/reset/reset-imx7.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) I think Philipp will pick it up, so I will drop it from the PCI patchwork, if there is a problem please let me know. Thanks, Lorenzo > diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c > index 4db177bc89bc..fdeac1946429 100644 > --- a/drivers/reset/reset-imx7.c > +++ b/drivers/reset/reset-imx7.c > @@ -78,11 +78,11 @@ static struct imx7_src *to_imx7_src(struct reset_controller_dev *rcdev) > static int imx7_reset_set(struct reset_controller_dev *rcdev, > unsigned long id, bool assert) > { > struct imx7_src *imx7src = to_imx7_src(rcdev); > const struct imx7_src_signal *signal = &imx7_src_signals[id]; > - unsigned int value = 0; > + unsigned int value = assert ? signal->bit : 0; > > switch (id) { > case IMX7_RESET_PCIEPHY: > /* > * wait for more than 10us to release phy g_rst and > -- > 2.17.0 >
diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c index 4db177bc89bc..fdeac1946429 100644 --- a/drivers/reset/reset-imx7.c +++ b/drivers/reset/reset-imx7.c @@ -78,11 +78,11 @@ static struct imx7_src *to_imx7_src(struct reset_controller_dev *rcdev) static int imx7_reset_set(struct reset_controller_dev *rcdev, unsigned long id, bool assert) { struct imx7_src *imx7src = to_imx7_src(rcdev); const struct imx7_src_signal *signal = &imx7_src_signals[id]; - unsigned int value = 0; + unsigned int value = assert ? signal->bit : 0; switch (id) { case IMX7_RESET_PCIEPHY: /* * wait for more than 10us to release phy g_rst and
Right now the only user of reset-imx7 is pci-imx6 and the reset_control_assert and deassert calls on pciephy_reset don't toggle the PCIEPHY_BTN and PCIEPHY_G_RST bits as expected. Fix this by writing 1 or 0 respectively. The reference manual is not very clear regarding SRC_PCIEPHY_RCR but for other registers like MIPIPHY and HSICPHY the bits are explicitly documented as "1 means assert, 0 means deassert". The values are still reversed for IMX7_RESET_PCIE_CTRL_APPS_EN. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> --- drivers/reset/reset-imx7.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)