From patchwork Wed Mar 4 19:39:57 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Duc Dang X-Patchwork-Id: 5939771 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 9BB7FBF440 for ; Wed, 4 Mar 2015 19:48:25 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 43CD32034A for ; Wed, 4 Mar 2015 19:48:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1AE1A202F8 for ; Wed, 4 Mar 2015 19:48:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758755AbbCDTsV (ORCPT ); Wed, 4 Mar 2015 14:48:21 -0500 Received: from exprod5og121.obsmtp.com ([64.18.0.139]:58603 "EHLO mail-pa0-f54.google.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1755323AbbCDTsT (ORCPT ); Wed, 4 Mar 2015 14:48:19 -0500 X-Greylist: delayed 353 seconds by postgrey-1.27 at vger.kernel.org; Wed, 04 Mar 2015 14:48:19 EST Received: from mail-pa0-f54.google.com ([209.85.220.54]) (using TLSv1) by exprod5ob121.postini.com ([64.18.4.12]) with SMTP ID DSNKVPdhg6C7EaELmU2Kr2AU18rqVwRuZxIQ@postini.com; Wed, 04 Mar 2015 11:48:19 PST Received: by padet14 with SMTP id et14so12109132pad.11 for ; Wed, 04 Mar 2015 11:48:18 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=sWMJxVEyffwPcUW7qFQJxWoRqccCcOR8cDoL2apZZaw=; b=W7N2r7uF6+JmGSSuxjeiqRUIo7wFIPVCgrevaQscKx6YUIPXYvvC5XPd/ixVRGtdTh VjxVPp04NeK1EdQGjZVRVhovzh//fBIegL1IuDEEsiLx8dd5qeL1Ch29pfU75mvGfnuD +FqOkkMpBU5LjJ+nEIjCEXCf8nhGoIJJGG29g1R91Wityjdc32PxL/YlvvDowUyhpH9h QEw12EKjuUEAhK9L3dwph1t4zf0/q/Ou/mk/k26VbvdCLEcOHyB8TWGuzoN0HjK0abNm lUecxwJDeQ+64B5LJAaOuyHTQyHPFgqeoHAZu4/S2o06saWkdvNaLl3xwI9+j0kUIbp4 J8Gg== X-Received: by 10.70.4.226 with SMTP id n2mr9505621pdn.11.1425498146037; Wed, 04 Mar 2015 11:42:26 -0800 (PST) X-Gm-Message-State: ALoCoQm+6lLlhZZflBvS3hs0ncj5wq4MJm76dllJJ1MO7YeSQCqtkTuAfr2EoS09uW4fXIFjtuyoNx3EXKFSZ1Ih9lg7Y05Qp5SyLuidKfIzE200dnWkYMWaFNFBdRcDOxaj2lNCN49ESrvpzL12zWDXHYin6SBohA== X-Received: by 10.70.4.226 with SMTP id n2mr9505602pdn.11.1425498145924; Wed, 04 Mar 2015 11:42:25 -0800 (PST) Received: from dhdang-Precision-WorkStation-T3400.amcc.com (67-207-112-226.static.wiline.com. [67.207.112.226]) by mx.google.com with ESMTPSA id fk1sm4850874pab.16.2015.03.04.11.42.24 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 04 Mar 2015 11:42:25 -0800 (PST) From: Duc Dang To: Bjorn Helgaas , Arnd Bergmann , Grant Likely , Liviu Dudau Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tanmay Inamdar , Loc Ho , Feng Kan , Duc Dang Subject: [PATCH v2 1/4] PCI: X-Gene: Add the APM X-Gene v1 PCIe MSI/MSIX termination driver Date: Wed, 4 Mar 2015 11:39:57 -0800 Message-Id: X-Mailer: git-send-email 1.9.1 In-Reply-To: References: In-Reply-To: References: <1678162.2PJ2o1jRen@wuerfel> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP X-Gene v1 SOC supports total 2688 MSI/MSIX vectors coalesced into 16 HW IRQ lines. Signed-off-by: Duc Dang Signed-off-by: Tanmay Inamdar --- drivers/pci/host/Kconfig | 4 + drivers/pci/host/Makefile | 1 + drivers/pci/host/pci-xgene-msi.c | 393 +++++++++++++++++++++++++++++++++++++++ drivers/pci/host/pci-xgene.c | 25 +++ 4 files changed, 423 insertions(+) create mode 100644 drivers/pci/host/pci-xgene-msi.c diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig index 7b892a9..6c0f98c 100644 --- a/drivers/pci/host/Kconfig +++ b/drivers/pci/host/Kconfig @@ -84,11 +84,15 @@ config PCIE_XILINX Say 'Y' here if you want kernel to support the Xilinx AXI PCIe Host Bridge driver. +config PCI_XGENE_MSI + bool + config PCI_XGENE bool "X-Gene PCIe controller" depends on ARCH_XGENE depends on OF select PCIEPORTBUS + select PCI_XGENE_MSI if PCI_MSI help Say Y here if you want internal PCI support on APM X-Gene SoC. There are 5 internal PCIe ports available. Each port is GEN3 capable diff --git a/drivers/pci/host/Makefile b/drivers/pci/host/Makefile index e61d91c..f39bde3 100644 --- a/drivers/pci/host/Makefile +++ b/drivers/pci/host/Makefile @@ -11,5 +11,6 @@ obj-$(CONFIG_PCIE_SPEAR13XX) += pcie-spear13xx.o obj-$(CONFIG_PCI_KEYSTONE) += pci-keystone-dw.o pci-keystone.o obj-$(CONFIG_PCIE_XILINX) += pcie-xilinx.o obj-$(CONFIG_PCI_XGENE) += pci-xgene.o +obj-$(CONFIG_PCI_XGENE_MSI) += pci-xgene-msi.o obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o obj-$(CONFIG_PCI_VERSATILE) += pci-versatile.o diff --git a/drivers/pci/host/pci-xgene-msi.c b/drivers/pci/host/pci-xgene-msi.c new file mode 100644 index 0000000..e1cab39 --- /dev/null +++ b/drivers/pci/host/pci-xgene-msi.c @@ -0,0 +1,393 @@ +/* + * APM X-Gene MSI Driver + * + * Copyright (c) 2014, Applied Micro Circuits Corporation + * Author: Tanmay Inamdar + * Duc Dang + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include +#include +#include +#include +#include +#include +#include + +#define MSI_INDEX0 0x000000 +#define MSI_INT0 0x800000 + +struct xgene_msi_settings { + u32 index_per_group; + u32 irqs_per_index; + u32 nr_msi_vec; + u32 nr_hw_irqs; +}; + +struct xgene_msi { + struct irq_domain *irqhost; + struct msi_controller msi_chip; + struct xgene_msi_settings *settings; + u32 msi_addr_lo; + u32 msi_addr_hi; + void __iomem *msi_regs; + unsigned long *bitmap; + struct mutex bitmap_lock; + int *msi_virqs; +}; + +static inline struct xgene_msi *to_xgene_msi(struct msi_controller *msi_chip) +{ + return container_of(msi_chip, struct xgene_msi, msi_chip); +} + +struct xgene_msi_settings storm_msi_settings = { + .index_per_group = 8, + .irqs_per_index = 21, + .nr_msi_vec = 2688, + .nr_hw_irqs = 16, +}; + +typedef int (*xgene_msi_initcall_t)(struct xgene_msi *); + +static inline irq_hw_number_t virq_to_hw(unsigned int virq) +{ + struct irq_data *irq_data = irq_get_irq_data(virq); + + return WARN_ON(!irq_data) ? 0 : irq_data->hwirq; +} + +static int xgene_msi_init_storm_settings(struct xgene_msi *xgene_msi) +{ + xgene_msi->settings = &storm_msi_settings; + return 0; +} + +static struct irq_chip xgene_msi_chip = { + .name = "X-Gene-1 MSI", + .irq_enable = pci_msi_unmask_irq, + .irq_disable = pci_msi_mask_irq, + .irq_mask = pci_msi_mask_irq, + .irq_unmask = pci_msi_unmask_irq, +}; + +static int xgene_msi_host_map(struct irq_domain *h, unsigned int virq, + irq_hw_number_t hw) +{ + irq_set_chip_and_handler(virq, &xgene_msi_chip, handle_simple_irq); + irq_set_chip_data(virq, h->host_data); + set_irq_flags(irq, IRQF_VALID); + + return 0; +} + +static const struct irq_domain_ops xgene_msi_host_ops = { + .map = xgene_msi_host_map, +}; + +static int xgene_msi_alloc(struct xgene_msi *xgene_msi) +{ + u32 msi_irq_count = xgene_msi->settings->nr_msi_vec; + int msi; + + mutex_lock(&xgene_msi->bitmap_lock); + + msi = find_first_zero_bit(xgene_msi->bitmap, msi_irq_count); + if (msi < msi_irq_count) + set_bit(msi, xgene_msi->bitmap); + else + msi = -ENOSPC; + + mutex_unlock(&xgene_msi->bitmap_lock); + + return msi; +} + +static void xgene_msi_free(struct xgene_msi *xgene_msi, unsigned long irq) +{ + mutex_lock(&xgene_msi->bitmap_lock); + + if (!test_bit(irq, xgene_msi->bitmap)) + pr_err("trying to free unused MSI#%lu\n", irq); + else + clear_bit(irq, xgene_msi->bitmap); + + mutex_unlock(&xgene_msi->bitmap_lock); +} + +static int xgene_msi_init_allocator(struct xgene_msi *xgene_msi) +{ + u32 msi_irq_count = xgene_msi->settings->nr_msi_vec; + u32 hw_irq_count = xgene_msi->settings->nr_hw_irqs; + int size = BITS_TO_LONGS(msi_irq_count) * sizeof(long); + + xgene_msi->bitmap = kzalloc(size, GFP_KERNEL); + if (!xgene_msi->bitmap) + return -ENOMEM; + mutex_init(&xgene_msi->bitmap_lock); + + xgene_msi->msi_virqs = kcalloc(hw_irq_count, sizeof(int), GFP_KERNEL); + if (!xgene_msi->msi_virqs) + return -ENOMEM; + return 0; +} + +static void xgene_msi_teardown_irq(struct msi_controller *chip, + unsigned int irq) +{ + struct xgene_msi *xgene_msi = to_xgene_msi(chip); + + irq_set_msi_desc(irq, NULL); + xgene_msi_free(xgene_msi, virq_to_hw(irq)); +} + +static void xgene_compose_msi_msg(struct pci_dev *dev, int hwirq, + struct msi_msg *msg, + struct xgene_msi *xgene_msi) +{ + u32 nr_hw_irqs = xgene_msi->settings->nr_hw_irqs; + u32 irqs_per_index = xgene_msi->settings->irqs_per_index; + u32 reg_set = hwirq / (nr_hw_irqs * irqs_per_index); + u32 group = hwirq % nr_hw_irqs; + + msg->address_hi = xgene_msi->msi_addr_hi; + msg->address_lo = xgene_msi->msi_addr_lo + + (((8 * group) + reg_set) << 16); + msg->data = (hwirq / nr_hw_irqs) % irqs_per_index; +} + +static int xgene_msi_setup_irq(struct msi_controller *chip, + struct pci_dev *pdev, struct msi_desc *desc) +{ + struct xgene_msi *xgene_msi = to_xgene_msi(chip); + struct msi_msg msg; + unsigned long virq, gic_irq; + int hwirq; + + hwirq = xgene_msi_alloc(xgene_msi); + if (hwirq < 0) { + dev_err(&pdev->dev, "failed to allocate MSI\n"); + return -ENOSPC; + } + + virq = irq_create_mapping(xgene_msi->irqhost, hwirq); + if (virq == 0) { + dev_err(&pdev->dev, "failed to map hwirq %i\n", hwirq); + return -ENOSPC; + } + + gic_irq = xgene_msi->msi_virqs[hwirq % + xgene_msi->settings->nr_hw_irqs]; + pr_debug("Mapp HWIRQ %d on GIC IRQ %lu TO VIRQ %lu\n", + hwirq, gic_irq, virq); + irq_set_msi_desc(virq, desc); + xgene_compose_msi_msg(pdev, hwirq, &msg, xgene_msi); + irq_set_handler_data(virq, (void *)gic_irq); + write_msi_msg(virq, &msg); + + return 0; +} + +static irqreturn_t xgene_msi_isr(int irq, void *data) +{ + struct xgene_msi *xgene_msi = (struct xgene_msi *) data; + unsigned int virq; + int msir_index, msir_reg, msir_val, hw_irq; + u32 intr_index, grp_select, msi_grp, processed = 0; + u32 nr_hw_irqs, irqs_per_index, index_per_group; + + msi_grp = irq - xgene_msi->msi_virqs[0]; + if (msi_grp >= xgene_msi->settings->nr_hw_irqs) { + pr_err("invalid msi received\n"); + return IRQ_NONE; + } + + nr_hw_irqs = xgene_msi->settings->nr_hw_irqs; + irqs_per_index = xgene_msi->settings->irqs_per_index; + index_per_group = xgene_msi->settings->index_per_group; + + grp_select = readl(xgene_msi->msi_regs + MSI_INT0 + (msi_grp << 16)); + while (grp_select) { + msir_index = ffs(grp_select) - 1; + msir_reg = (msi_grp << 19) + (msir_index << 16); + msir_val = readl(xgene_msi->msi_regs + MSI_INDEX0 + msir_reg); + while (msir_val) { + intr_index = ffs(msir_val) - 1; + hw_irq = (((msir_index * irqs_per_index) + intr_index) * + nr_hw_irqs) + msi_grp; + virq = irq_find_mapping(xgene_msi->irqhost, hw_irq); + if (virq != 0) + generic_handle_irq(virq); + msir_val &= ~(1 << intr_index); + processed++; + } + grp_select &= ~(1 << msir_index); + } + + return processed > 0 ? IRQ_HANDLED : IRQ_NONE; +} + +static int xgene_msi_remove(struct platform_device *pdev) +{ + int virq, i; + struct xgene_msi *msi = platform_get_drvdata(pdev); + u32 nr_hw_irqs = msi->settings->nr_hw_irqs; + + for (i = 0; i < nr_hw_irqs; i++) { + virq = msi->msi_virqs[i]; + if (virq != 0) + free_irq(virq, msi); + } + + kfree(msi->bitmap); + msi->bitmap = NULL; + + return 0; +} + +static int xgene_msi_setup_hwirq(struct xgene_msi *msi, + struct platform_device *pdev, + int irq_index) +{ + int virt_msir; + cpumask_var_t mask; + int err; + + virt_msir = platform_get_irq(pdev, irq_index); + if (virt_msir < 0) { + dev_err(&pdev->dev, "Cannot translate IRQ index %d\n", + irq_index); + return -EINVAL; + } + + err = request_irq(virt_msir, xgene_msi_isr, 0, "xgene-msi", msi); + if (err) { + dev_err(&pdev->dev, "request irq failed\n"); + return err; + } + + if (alloc_cpumask_var(&mask, GFP_KERNEL)) { + cpumask_setall(mask); + irq_set_affinity(virt_msir, mask); + free_cpumask_var(mask); + } + + msi->msi_virqs[irq_index] = virt_msir; + + return 0; +} + +static const struct of_device_id xgene_msi_match_table[] = { + {.compatible = "apm,xgene1-msi", + .data = xgene_msi_init_storm_settings}, + {}, +}; + +static int xgene_msi_probe(struct platform_device *pdev) +{ + struct resource *res; + int rc, irq_index; + struct device_node *np; + const struct of_device_id *matched_np; + struct xgene_msi *xgene_msi; + xgene_msi_initcall_t init_fn; + u32 nr_hw_irqs, nr_msi_vecs; + + np = of_find_matching_node_and_match(NULL, + xgene_msi_match_table, &matched_np); + if (!np) + return -ENODEV; + + xgene_msi = kzalloc(sizeof(struct xgene_msi), GFP_KERNEL); + if (!xgene_msi) { + dev_err(&pdev->dev, "failed to allocate X-Gene MSI data\n"); + return -ENOMEM; + } + + init_fn = (xgene_msi_initcall_t) matched_np->data; + rc = init_fn(xgene_msi); + if (rc) + return rc; + + platform_set_drvdata(pdev, xgene_msi); + + nr_msi_vecs = xgene_msi->settings->nr_msi_vec; + xgene_msi->irqhost = irq_domain_add_linear(pdev->dev.of_node, + nr_msi_vecs, &xgene_msi_host_ops, xgene_msi); + if (!xgene_msi->irqhost) { + dev_err(&pdev->dev, "No memory for MSI irqhost\n"); + rc = -ENOMEM; + goto error; + } + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + xgene_msi->msi_regs = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(xgene_msi->msi_regs)) { + dev_err(&pdev->dev, "no reg space\n"); + rc = -EINVAL; + goto error; + } + + xgene_msi->msi_addr_hi = upper_32_bits(res->start); + xgene_msi->msi_addr_lo = lower_32_bits(res->start); + + rc = xgene_msi_init_allocator(xgene_msi); + if (rc) { + dev_err(&pdev->dev, "Error allocating MSI bitmap\n"); + goto error; + } + + nr_hw_irqs = xgene_msi->settings->nr_hw_irqs; + for (irq_index = 0; irq_index < nr_hw_irqs; irq_index++) { + rc = xgene_msi_setup_hwirq(xgene_msi, pdev, irq_index); + if (rc) + goto error; + } + + xgene_msi->msi_chip.dev = &pdev->dev; + xgene_msi->msi_chip.of_node = np; + xgene_msi->msi_chip.setup_irq = xgene_msi_setup_irq; + xgene_msi->msi_chip.teardown_irq = xgene_msi_teardown_irq; + + rc = of_pci_msi_chip_add(&xgene_msi->msi_chip); + if (rc) { + dev_err(&pdev->dev, "failed to add MSI controller chip\n"); + goto error; + } + + dev_info(&pdev->dev, "APM X-Gene PCIe MSI driver loaded\n"); + + return 0; +error: + xgene_msi_remove(pdev); + return rc; +} + +static struct platform_driver xgene_msi_driver = { + .driver = { + .name = "xgene-msi", + .owner = THIS_MODULE, + .of_match_table = xgene_msi_match_table, + }, + .probe = xgene_msi_probe, + .remove = xgene_msi_remove, +}; + +static int __init xgene_pcie_msi_init(void) +{ + return platform_driver_register(&xgene_msi_driver); +} +subsys_initcall(xgene_pcie_msi_init); + +MODULE_AUTHOR("Duc Dang "); +MODULE_DESCRIPTION("APM X-Gene PCIe MSI driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/pci/host/pci-xgene.c b/drivers/pci/host/pci-xgene.c index ee082c0..63d58e6 100644 --- a/drivers/pci/host/pci-xgene.c +++ b/drivers/pci/host/pci-xgene.c @@ -468,6 +468,23 @@ static int xgene_pcie_setup(struct xgene_pcie_port *port, return 0; } +static int xgene_pcie_msi_enable(struct pci_bus *bus) +{ + struct device_node *msi_node; + + msi_node = of_parse_phandle(bus->dev.of_node, + "msi-parent", 0); + if (!msi_node) + return -ENODEV; + + bus->msi = of_pci_find_msi_chip_by_node(msi_node); + if (bus->msi) + bus->msi->dev = &bus->dev; + else + return -ENODEV; + return 0; +} + static int xgene_pcie_probe_bridge(struct platform_device *pdev) { struct device_node *dn = pdev->dev.of_node; @@ -504,6 +521,14 @@ static int xgene_pcie_probe_bridge(struct platform_device *pdev) if (!bus) return -ENOMEM; + if (IS_ENABLED(CONFIG_PCI_MSI)) { + ret = xgene_pcie_msi_enable(bus); + if (ret) { + dev_err(port->dev, "failed to enable MSI\n"); + return ret; + } + } + pci_scan_child_bus(bus); pci_assign_unassigned_bus_resources(bus); pci_bus_add_devices(bus);