From patchwork Mon Aug 5 20:06:20 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Metcalf X-Patchwork-Id: 2839017 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8578ABF535 for ; Mon, 5 Aug 2013 20:49:39 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 53B712041E for ; Mon, 5 Aug 2013 20:49:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 184D820450 for ; Mon, 5 Aug 2013 20:49:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755169Ab3HEUmj (ORCPT ); Mon, 5 Aug 2013 16:42:39 -0400 Received: from usmamail.tilera.com ([12.216.194.151]:50969 "EHLO USMAMAIL.TILERA.COM" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755026Ab3HEUmh (ORCPT ); Mon, 5 Aug 2013 16:42:37 -0400 Received: from farm-0012.internal.tilera.com (10.2.0.42) by USMAEXCH2.tad.internal.tilera.com (10.3.0.33) with Microsoft SMTP Server (TLS) id 14.0.722.0; Mon, 5 Aug 2013 16:42:36 -0400 Received: (from cmetcalf@localhost) by farm-0012.internal.tilera.com (8.14.4/8.12.11/Submit) id r75Kga0h031005; Mon, 5 Aug 2013 16:42:36 -0400 Message-ID: In-Reply-To: References: From: Chris Metcalf Date: Mon, 5 Aug 2013 16:06:20 -0400 Subject: [PATCH 02/20] tile PCI RC: tilepro conflict with PCI and RAM addresses To: , MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Fix a bug in the tilepro PCI resource allocation code that could make the bootmem allocator unhappy if 4GB is installed on mshim 0. Signed-off-by: Chris Metcalf --- arch/tile/kernel/setup.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/tile/kernel/setup.c b/arch/tile/kernel/setup.c index 68b5426..676e155 100644 --- a/arch/tile/kernel/setup.c +++ b/arch/tile/kernel/setup.c @@ -614,11 +614,12 @@ static void __init setup_bootmem_allocator_node(int i) /* * Throw away any memory aliased by the PCI region. */ - if (pci_reserve_start_pfn < end && pci_reserve_end_pfn > start) - reserve_bootmem(PFN_PHYS(pci_reserve_start_pfn), - PFN_PHYS(pci_reserve_end_pfn - - pci_reserve_start_pfn), + if (pci_reserve_start_pfn < end && pci_reserve_end_pfn > start) { + start = max(pci_reserve_start_pfn, start); + end = min(pci_reserve_end_pfn, end); + reserve_bootmem(PFN_PHYS(start), PFN_PHYS(end - start), BOOTMEM_EXCLUSIVE); + } #endif }