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Sun, 12 May 2024 08:25:42 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 44C8Pgbe005072; Sun, 12 May 2024 08:25:42 GMT Received: from hu-devc-blr-u22-a.qualcomm.com (hu-devipriy-blr.qualcomm.com [10.131.37.37]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 44C8PgmY005068 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sun, 12 May 2024 08:25:42 +0000 Received: by hu-devc-blr-u22-a.qualcomm.com (Postfix, from userid 4059087) id 5650740FAB; Sun, 12 May 2024 13:55:41 +0530 (+0530) From: devi priya To: vkoul@kernel.org, kishon@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dmitry.baryshkov@linaro.org, neil.armstrong@linaro.org, quic_msarkar@quicinc.com, quic_qianyu@quicinc.com, abel.vesa@linaro.org, quic_cang@quicinc.com, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: quic_devipriy@quicinc.com Subject: [PATCH V3 0/2] Add support for PCIe PHY in IPQ9574 Date: Sun, 12 May 2024 13:55:39 +0530 Message-Id: <20240512082541.1805335-1-quic_devipriy@quicinc.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: kgD1dCnPPJFxMCUv4mWc6HppYf7OQ4Gi X-Proofpoint-GUID: kgD1dCnPPJFxMCUv4mWc6HppYf7OQ4Gi X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-12_05,2024-05-10_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 impostorscore=0 malwarescore=0 phishscore=0 spamscore=0 bulkscore=0 priorityscore=1501 adultscore=0 suspectscore=0 clxscore=1011 mlxlogscore=884 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405010000 definitions=main-2405120063 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240512_012557_820174_A6A91CE5 X-CRM114-Status: UNSURE ( 8.43 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org This series adds support for a single-lane and two-lane PCIe PHYs found on Qualcomm IPQ9574 platform. [V3] Change logs are added to the respective patches. [V2] https://lore.kernel.org/linux-arm-msm/20230519085723.15601-1-quic_devipriy@quicinc.com/ [V1] https://lore.kernel.org/linux-arm-msm/20230421124150.21190-1-quic_devipriy@quicinc.com/ devi priya (2): dt-bindings: phy: qcom,ipq8074-qmp-pcie: Document the IPQ9574 QMP PCIe PHYs phy: qcom-qmp-pcie: Add support for IPQ9574 g3x1 and g3x2 PCIEs .../phy/qcom,ipq8074-qmp-pcie-phy.yaml | 2 + drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 309 ++++++++++++++++++ .../phy/qualcomm/phy-qcom-qmp-pcs-pcie-v5.h | 14 + .../phy/qualcomm/phy-qcom-qmp-qserdes-pll.h | 3 + 4 files changed, 328 insertions(+) base-commit: e7b4ef8fffaca247809337bb78daceb406659f2d prerequisite-patch-id: 513cb089a74b49996b46345595d1aacf60dcda64 prerequisite-patch-id: ce7a8e9bac53fd5f02921bff6bc54149fb92f996 prerequisite-patch-id: c26478e61e583eb879385598f26b42b8271036f5 prerequisite-patch-id: a5c15da6a968e673737dc5aa962f31576903f8aa prerequisite-patch-id: 353eb53cd192489d5b0c4654a0b922f23e1f7217 prerequisite-patch-id: d282ba7948460ae4d2f541c8c25ff5089ff6507e prerequisite-patch-id: 5141131d46f7789b50ac806f10b63869d15d709f