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a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240521_133054_009951_6F93DF88 X-CRM114-Status: UNSURE ( 8.87 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org While testing the linux-next on SM8450-HDK I noticed that one of the PCIe hosts stays in the deferred state, because the corresponding PHY isn't probed. A quick debug pointed out that while the patches that added support for the PIPE AUX clock to the PHY driver have landed, corresponding DT changes were not picked up for 6.10. Restore the compatibility with the existing DT files by dropping the second entry in the clock-output-names array and always generating the corresponding name on the fly. Signed-off-by: Dmitry Baryshkov --- Dmitry Baryshkov (2): phy: qcom: qmp-pcie: restore compatibility with existing DTs dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: drop second output clock name .../devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 7 +------ drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 9 +++------ 2 files changed, 4 insertions(+), 12 deletions(-) --- base-commit: 632483ea8004edfadd035de36e1ab2c7c4f53158 change-id: 20240521-fix-pcie-phy-compat-b0fd4eb46bda Best regards,