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[v3,0/4] pci: qcom: Add QCS615 PCIe support

Message ID 20250310065613.151598-1-quic_ziyuzhan@quicinc.com
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Series pci: qcom: Add QCS615 PCIe support | expand

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Ziyue Zhang March 10, 2025, 6:56 a.m. UTC 
This series adds document, phy, configs support for PCIe in QCS615.

Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
Signed-off-by: Ziyue Zhang <quic_ziyuzhan@quicinc.com>
---
Have following changes:
	- Add a new Document the QCS615 PCIe Controller
	- Add configurations in devicetree for PCIe, including registers, clocks, interrupts and phy setting sequence.
	- Add configurations in devicetree for PCIe, platform related gpios, PMIC regulators, etc.

Changes in v3:
- Update qcs615 dt-bindings to fit the qcom-soc.yaml (Krzysztof & Dmitry)
- Removed the driver patch and using fallback method (Mani)
- Update DT format, keep it same with the x1e801000.dtsi (Konrad)
- Update DT commit message (Bojor)
- Link to v2: https://lore.kernel.org/all/20241122023314.1616353-1-quic_ziyuzhan@quicinc.com/

Changes in v2:
- Update commit message for qcs615 phy
- Update qcs615 phy, using lowercase hex
- Removed redundant function
- split the soc dtsi and the platform dts into two changes
- Link to v1: https://lore.kernel.org/all/20241118082619.177201-1-quic_ziyuzhan@quicinc.com/

Krishna chaitanya chundru (4):
  dt-bindings: PCI: qcom: Document the QCS615 PCIe Controller
  arm64: dts: qcom: qcs615: enable pcie
  arm64: dts: qcom: qcs615-ride: Enable PCIe interface
  PCI: qcom: Add support for QCS615 SoC

 .../bindings/pci/qcom,qcs615-pcie.yaml        | 160 ++++++++++++++++++
 arch/arm64/boot/dts/qcom/qcs615.dtsi          | 142 ++++++++++++++++
 arch/arm64/boot/dts/qcom/qcs8300-ride.dts     |  40 +++++
 drivers/pci/controller/dwc/pcie-qcom.c        |   1 +
 4 files changed, 343 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pci/qcom,qcs615-pcie.yaml


base-commit: c674aa7c289e51659e40dda0f954886ef7f80042