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Mon, 10 Mar 2025 06:56:21 +0000 Received: from APTAIPPMTA02.qualcomm.com (APTAIPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 52A6uL4X004053; Mon, 10 Mar 2025 06:56:21 GMT Received: from cse-cd02-lnx.ap.qualcomm.com (cse-cd02-lnx.qualcomm.com [10.64.75.246]) by APTAIPPMTA02.qualcomm.com (PPS) with ESMTPS id 52A6uKJC004050 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 10 Mar 2025 06:56:21 +0000 Received: by cse-cd02-lnx.ap.qualcomm.com (Postfix, from userid 4438065) id E9FAA27C9; Mon, 10 Mar 2025 14:56:14 +0800 (CST) From: Ziyue Zhang To: bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com, manivannan.sadhasivam@linaro.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, vkoul@kernel.org, kishon@kernel.org, andersson@kernel.org, konradybcio@kernel.org, dmitry.baryshkov@linaro.org, neil.armstrong@linaro.org, abel.vesa@linaro.org Cc: quic_ziyuzhan@quicinc.com, quic_qianyu@quicinc.com, quic_krichai@quicinc.com, johan+linaro@kernel.org, linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org Subject: [PATCH v3 0/4] pci: qcom: Add QCS615 PCIe support Date: Mon, 10 Mar 2025 14:56:09 +0800 Message-Id: <20250310065613.151598-1-quic_ziyuzhan@quicinc.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 8zqREHV0XN9NCohNZFnsTmKWye8PgT-b X-Authority-Analysis: v=2.4 cv=KK2gDEFo c=1 sm=1 tr=0 ts=67ce8d18 cx=c_pps a=nuhDOHQX5FNHPW3J6Bj6AA==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=Vs1iUdzkB0EA:10 a=VwQbUJbxAAAA:8 a=COk6AnOGAAAA:8 a=esfGit-853AAzAUiwWkA:9 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-ORIG-GUID: 8zqREHV0XN9NCohNZFnsTmKWye8PgT-b X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1093,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-10_02,2025-03-07_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 mlxlogscore=549 clxscore=1015 malwarescore=0 adultscore=0 impostorscore=0 mlxscore=0 lowpriorityscore=0 priorityscore=1501 bulkscore=0 spamscore=0 suspectscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502100000 definitions=main-2503100053 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250309_235632_934476_6C6B86E2 X-CRM114-Status: GOOD ( 12.63 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org This series adds document, phy, configs support for PCIe in QCS615. Signed-off-by: Krishna chaitanya chundru Signed-off-by: Ziyue Zhang --- Have following changes: - Add a new Document the QCS615 PCIe Controller - Add configurations in devicetree for PCIe, including registers, clocks, interrupts and phy setting sequence. - Add configurations in devicetree for PCIe, platform related gpios, PMIC regulators, etc. Changes in v3: - Update qcs615 dt-bindings to fit the qcom-soc.yaml (Krzysztof & Dmitry) - Removed the driver patch and using fallback method (Mani) - Update DT format, keep it same with the x1e801000.dtsi (Konrad) - Update DT commit message (Bojor) - Link to v2: https://lore.kernel.org/all/20241122023314.1616353-1-quic_ziyuzhan@quicinc.com/ Changes in v2: - Update commit message for qcs615 phy - Update qcs615 phy, using lowercase hex - Removed redundant function - split the soc dtsi and the platform dts into two changes - Link to v1: https://lore.kernel.org/all/20241118082619.177201-1-quic_ziyuzhan@quicinc.com/ Krishna chaitanya chundru (4): dt-bindings: PCI: qcom: Document the QCS615 PCIe Controller arm64: dts: qcom: qcs615: enable pcie arm64: dts: qcom: qcs615-ride: Enable PCIe interface PCI: qcom: Add support for QCS615 SoC .../bindings/pci/qcom,qcs615-pcie.yaml | 160 ++++++++++++++++++ arch/arm64/boot/dts/qcom/qcs615.dtsi | 142 ++++++++++++++++ arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 40 +++++ drivers/pci/controller/dwc/pcie-qcom.c | 1 + 4 files changed, 343 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/qcom,qcs615-pcie.yaml base-commit: c674aa7c289e51659e40dda0f954886ef7f80042