Message ID | 19ac11d6b9e5988d190025255c5ffe08c57c8023.1739961770.git.guchongchong@xiaomi.com |
---|---|
State | New |
Headers | show |
Series | phy: freescale: limit div value in FIELD_PREP() | expand |
On Wed, Feb 19, 2025 at 4:54 AM Chongchong Gu <chongchonggu21@gmail.com> wrote: > > From: guchongchong <guchongchong@xiaomi.com> > > In fsl_samsung_hdmi_phy_configure_pll_lock_det, the variable named > div becomes 4 after loop. It must less than 4 in function named > FIELD_PREP(REG12_CK_DIV_MASK, div). > There has already been a fix applied to linux-next to address this [1]. Have you tried this to see if it works with your compiler? adam [1] - https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/drivers/phy/freescale?h=next-20250219&id=cd57e4327707126dca3f9517b84274c001d4c184 > A way to reproduce when run the following shell command > make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- defconfig > make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- -j4 > > Fixes: <d567679f2b6a> ("phy: freescale: fsl-samsung-hdmi: Clean up") > Signed-off-by: guchongchong <guchongchong@xiaomi.com> > --- > drivers/phy/freescale/phy-fsl-samsung-hdmi.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c > index 45004f598e4d..0ad766359cbe 100644 > --- a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c > +++ b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c > @@ -337,7 +337,7 @@ fsl_samsung_hdmi_phy_configure_pll_lock_det(struct fsl_samsung_hdmi_phy *phy, > /* Find int_pllclk speed */ > for (div = 0; div < 4; div++) { > int_pllclk = pclk / (1 << div); > - if (int_pllclk < (50 * MHZ)) > + if (int_pllclk < (50 * MHZ) || div == 3) > break; > } > > -- > 2.48.1 >
diff --git a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c index 45004f598e4d..0ad766359cbe 100644 --- a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c +++ b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c @@ -337,7 +337,7 @@ fsl_samsung_hdmi_phy_configure_pll_lock_det(struct fsl_samsung_hdmi_phy *phy, /* Find int_pllclk speed */ for (div = 0; div < 4; div++) { int_pllclk = pclk / (1 << div); - if (int_pllclk < (50 * MHZ)) + if (int_pllclk < (50 * MHZ) || div == 3) break; }